Pin connector structure and method
US-9247642-B2 · Jan 26, 2016 · US
US9775242B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9775242-B2 |
| Application number | US-201615005589-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 25, 2016 |
| Priority date | Jun 26, 2012 |
| Publication date | Sep 26, 2017 |
| Grant date | Sep 26, 2017 |
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Embodiments pin connections, electronic devices, and methods are shown that include pin configurations to reduce voids and pin tilting and other concerns during pin attach operations, such as attachment to a chip package pin grid array. Pin head are shown that include features such as convex surfaces, a number of legs, and channels in pin head surfaces.
Opening claim text (preview).
What is claimed is: 1. A pin grid array, comprising; a substrate, including a number of electrical connections; a matrix material forming an interface with the electrical connections on the substrate; and a number of pins including pin shafts, and having pin heads embedded in the matrix, wherein one or more pins includes a pin head having at least three legs extending at an angle with respect to the pin shaft between, but not including 0 and 90 degrees. 2. The pin grid array of claim 1 , wherein the pin head includes a textured top surface. 3. The pin grid array of claim 2 , wherein the textured top surface includes one or more channels. 4. The pin grid array of claim 1 , wherein the matrix material includes solder. 5. The pin grid array of claim 4 , wherein the solder includes a tin-antimony solder. 6. A method of forming a pin connection, comprising: forming a pin, including a pin head having at least three legs extending at an angle with respect to the pin shaft between, but not including 0 and 90 degrees; placing the pin head in contact with an electrical connection on a substrate surface; and flowing solder around the pin head and in contact with the electrical connection to embed the pin head. 7. The method of claim 6 , further including channeling gas bubbles from beneath the pin head using gaps formed by the at least three legs. 8. The method of claim 6 , further including forming one or more channels in the top surface. 9. The method of claim 6 , wherein the pin grid connection is formed as part of a pin grid array.
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