Reconfigurable analog-to-digital converter, image sensor and mobile device including the same

Patent metadata

Field	Value
Publication number	US-9774347-B2
Application number	US-201414583982-A
Country	US
Kind code	B2
Filing date	Dec 29, 2014
Priority date	Apr 23, 2014
Publication date	Sep 26, 2017
Grant date	Sep 26, 2017

Abstract

An image sensor includes a pixel array, a controller, and a plurality of analog-to-digital converters. The pixel array includes a plurality of pixels coupled to column lines, respectively, and the plurality of pixels are configured to sense incident lights to generate analog signals through the column lines. The controller generate a conversion control signal that is configurable based on changes of at least one operational condition. The plurality of analog-to-digital converters are coupled to the column lines, respectively. The plurality of analog-to-digital converters perform a delta-sigma modulation and a digital filtering to convert the analog signals to digital signals. The plurality of analog-to-digital converters adjust a conversion gain internally in response to the conversion control signal.

First claim

What is claimed is:

1. An image sensor comprising:
a pixel array including a plurality of pixels coupled to column lines, respectively, the plurality of pixels configured to sense incident lights to generate analog signals through the column lines;
a controller configured to generate a conversion control signal that is configurable based on changes of at least one operation condition; and
a plurality of analog-to-digital converters coupled to the column lines, respectively, the plurality of analog-to-digital converters configured to perform a delta-sigma modulation and a digital filtering to convert the analog signals to digital signals and configured to adjust a conversion gain in response to the conversion control signal,
wherein each of the plurality of analog-to-digital converters is configured to adjust the conversion gain by configuring an integration order of the delta-sigma modulation in response to an order control signal included in the conversion control signal.

2. The image sensor of claim 1 , wherein each of the plurality of analog-to-digital converters is configured to adjust the conversion gain by configuring integration coefficients of the delta-sigma modulation in response to a coefficient control signal included in the conversion control signal.

3. The image sensor of claim 1 , wherein each of the plurality of analog-to-digital converters is configured to adjust the conversion gain by configuring a quantization bit number of the delta-sigma modulation in response to a quantization control signal included in the conversion control signal.

4. The image sensor of claim 1 , wherein each of the plurality of analog-to-digital converters is configured to receive a variable weight signal and adjust the conversion gain by performing the digital filtering in response to the variable weight signal that is configurable based on the changes of the at least one operation condition of the image sensor.

5. The image sensor of claim 1 , wherein each of the plurality of analog-to-digital converters comprises:
a modulator configured to perform the delta-sigma modulation of the analog signal to generate a modulation signal and configured to adjust the conversion gain in response to the conversion control signal; and
a digital filter configured to perform the digital filtering of the modulation signal to generate the digital signal which corresponds to the analog signal.

6. The image sensor of claim 5 , wherein the modulator comprises:
an input adder configured to subtract a feedback signal from the analog signal to generate a first signal;
a variable integration block configured to integrate the first signal to generate a second signal and configured to change the integration order and integration coefficients of the delta-sigma modulation in response to the conversion control signal;
a quantizer configured to generate the modulation signal based on the second signal and a plurality of reference signals; and
a digital-to-analog converter configured to select one feedback voltage of a plurality of feedback voltages in response to the modulation signal to generate the feedback signal.

7. The image sensor of claim 6 , wherein the variable integration block comprises:
a plurality of integrators that are cascade-coupled such that an output of a previous integrator is coupled to an input of a next integrator;
an integration adder configured to sum outputs of the plurality of integrators to generate the second signal; and
a switch block coupled between the outputs of the plurality of integrators and the integration adder, the switch block configured to control electrical connections between each of the outputs of the plurality of integrators and the integration adder in response to an order control signal being included in the conversion control signal.

8. The image sensor of claim 7 , wherein the integration adder comprises:
a plurality of variable capacitors configured to sum the outputs of the plurality of integrators through capacitive coupling, the plurality of variable capacitors having a plurality of capacitances that are respectively varied in response to a coefficient control signal included in the conversion control signal.

9. The image sensor of claim 6 , wherein the quantizer comprises:
a plurality of comparators configured to compare the second signal with each of the plurality of reference signals and configured to selectively enable at least one comparator of the comparators in response to a quantization control signal included in the conversion control signal; and
an encoder configured to generate the modulation signal based on outputs of the plurality of comparators.

10. The image sensor of claim 9 , wherein the quantizer is a variable quantizer configured to change a bit number of the modulation signal according to a number of the comparators that are enabled in response to the quantization control signal, among the plurality of comparators.

11. The image sensor of claim 5 , further comprising:
a weight signal generator configured to generate a variable weight signal that is configurable based on the changes of the at least one operational condition of the image sensor.

12. The image sensor of claim 11 , wherein the digital filter is configured to perform a sinc filtering or a matched filtering selectively based on the variable weight signal.

13. An analog-to-digital converter comprising:
a modulator configured to perform a delta-sigma modulation of an analog signal to generate a modulation signal and configured to adjust a conversion gain in response to a conversion control signal that is configurable based on changes of at least one operational condition; and
a digital filter configured to perform a digital filtering of the modulation signal to generate a digital signal which corresponds to the analog signal,
wherein the modulator is configured to adjust the conversion gain by configuring an integration order of the delta-sigma modulation in response to an order control signal included in the conversion control signal.

14. The analog-to-digital converter of claim 13 , wherein the modulator comprises:
an input adder configured to subtract a feedback signal from the analog signal to generate a first signal;
a variable integration block configured to integrate the first signal to generate a second signal and configured to change the integration order and integration coefficients of the delta-sigma modulation in response to the conversion control signal;
a quantizer configured to generate the modulation signal based on the second signal and a plurality of reference signals; and
a digital-to-analog converter configured to select one feedback voltage of a plurality of feedback voltages in response to the modulation signal to generate the feedback signal.

15. The analog-to-digital converter of claim 14 , wherein the variable integration block comprises:
a plurality of integrators that are cascade-coupled such that an output of a previous integrator is coupled to an input of a next integrator;
an integration adder configured to sum the outputs of the plurality of integrators; and
a switch block coupled between outputs of the plurality of integrators and the integration adder, the switch block configured to control electrical connections between each of the outputs of the plurality of integrators and the integration adder in response to an order control signal included in the conversion control signal.

16. The analog-to-digital converter of claim 15 , wherein the integration adder comprises:
a plurality of variable capacitors configured to sum the outputs of th

Assignees

• Samsung Electronics Co Ltd
• Industry-Academic Cooperation Foundation Yonsei Univ

Inventors

• Chae Youngcheol
• Kim Jae-Hong
• Song Seungwoo
• Jo Woojin
• Hwang Hyunseok

Classifications

• H03M3/484 Primary

  by adapting the gain of the feedback signal, e.g. by adapting the reference values of the digital/analogue converter in the feedback path · CPC title

• H03M3/394

  among different orders of the loop filter · CPC title

• H04N5/378

  Electricity · mapped topic

• H03M3/486

  by adapting the input gain · CPC title

• H03M1/123

  Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters · CPC title