Ramp voltage generator and image sensing device including the same

Patent metadata

Field	Value
Publication number	US-9774318-B2
Application number	US-201514749290-A
Country	US
Kind code	B2
Filing date	Jun 24, 2015
Priority date	Feb 24, 2015
Publication date	Sep 26, 2017
Grant date	Sep 26, 2017

Abstract

A ramp voltage generator includes a first ramp voltage generation block suitable for generating a first ramp voltage with a first slope in response to a bias signal and a first ramp control signal, and a second ramp voltage generation block suitable for generating a second ramp voltage with a second slope corresponding to the first slope in response to the bias signal, a second ramp control signal, and a slope correction signal.

First claim

What is claimed is:

1. A ramp voltage generator comprising:
a first ramp voltage generation block suitable for generating a first ramp voltage with a first slope in response to a bias signal and a first ramp control signal; and
a second ramp voltage generation block suitable for generating a second ramp voltage with a second slope corresponding to the first slope in response to the bias signal, a second ramp control signal, and a slope correction signal,
wherein the second slope is equal to the first slope.

2. The ramp voltage generator of claim 1 , further comprising:
a correction block suitable for storing the slope correction signal.

3. The ramp voltage generator of claim 1 , wherein the first ramp control signal is generated based on a first clock, and the second ramp control signal is generated based on a second clock that has a higher frequency than that of the first clock.

4. The ramp voltage generator of claim 1 , wherein the first ramp voltage generation block generates the first ramp voltage during a first conversion period, and the second ramp voltage generation block generates the second ramp voltage during a second conversion period which is different from the first conversion period.

5. A ramp voltage generator comprising:
a first source current generation unit suitable for generating a first source current in response to a first bias signal, and generating a second bias signal corresponding to the first source current;
a first ramp voltage generation unit suitable for generating a first mirror current that is varied by a coarse unit in response to the second bias signal and a coarse ramp control signal, and generating a coarse ramp voltage having a first slope based on the first mirror current;
a second source current generation unit suitable for generating a second source current that is corrected based on the first slope in response to the first bias signal and a slope correction signal, and generating a third bias signal corresponding to the second source current; and
a second ramp voltage generation unit suitable for generating a second mirror current that is varied by a fine unit in response to the third bias signal and a fine ramp control signal, and generating a fine ramp voltage having the first slope based on the second mirror current.

6. The ramp voltage generator of claim 5 , wherein the second source current generation unit comprises:
a second sinking section coupled between an output terminal of the third bias signal and a ground voltage terminal, wherein the second source current sinks to the ground voltage terminal in response to the first bias signal;
a plurality of second sourcing sections coupled between a power supply voltage terminal and a plurality of second sourcing nodes, respectively, wherein the second source current is sourced from the power supply voltage terminal in response to the third bias signal; and
a plurality of second switching sections coupled between the plurality of second sourcing nodes, respectively, and the output terminal of the third bias signal, and suitable for being selectively switched in response to the slope correction signal.

7. The ramp voltage generator of claim 5 , wherein the second ramp voltage generation unit comprises:
a second mirroring section coupled between a power supply voltage terminal and a plurality of second mirroring nodes, wherein the second source current is sourced from the power supply voltage terminal in response to the third bias signal;
a third switching section coupled between the plurality of second mirroring nodes and an output terminal of the fine ramp voltage, and suitable for being sequentially switched in response to the fine ramp control signal; and
a second resistor section coupled between the output terminal of the fine ramp voltage and a ground voltage terminal.

8. The ramp voltage generator of claim 5 , further comprising:
a storage unit suitable for storing the slope correction signal.

9. The ramp voltage generator of claim 5 , wherein the first source current generation unit comprises:
a first sinking section coupled between an output terminal of the second bias signal and a ground voltage terminal, wherein the first source current sinks to the ground voltage terminal in response to the first bias signal; and
a first sourcing section coupled between a power supply voltage terminal and the output terminal of the second bias signal, wherein the first source current is sourced from the power supply voltage terminal in response to the second bias signal.

10. The ramp voltage generator of claim 5 , wherein the first ramp voltage generation unit comprises:
a first mirroring section coupled between a power supply voltage terminal and a plurality of first mirroring nodes, wherein the first source current is sourced from the power supply voltage terminal in response to the second bias signal;
a first switching section coupled between the plurality of first mirroring nodes and an output terminal of the coarse ramp voltage, and suitable for being sequentially switched in response to the coarse ramp control signal; and
a first resistor section coupled between the output terminal of the coarse ramp voltage and a ground voltage terminal.

11. The ramp voltage generator of claim 5 , wherein the coarse ramp control signal is generated based on a first clock, and the fine ramp control signal is generated based on a second clock with a frequency that is higher than that of the first clock.

12. An image sensing device comprising:
a pixel array suitable for generating a plurality of pixel signals;
an analog-to-digital converter suitable for generating a plurality of digital signals corresponding to the plurality of pixel signals by using a coarse ramp voltage and a fine ramp voltage in common for each of the plurality of pixel signals; and
a ramp voltage generator suitable for generating the coarse ramp voltage having a first slope and the fine ramp voltage having a second slope that is corrected based on the first slope in response to a bias signal, a coarse ramp control signal, and a fine ramp control signal.

13. The image sensing device of claim 12 , wherein the second slope is equal to the first slope.

14. The image sensing device of claim 12 , wherein the ramp voltage generator comprises:
a correction block suitable for storing a slope correction signal;
a first ramp voltage generation block suitable for generating the coarse ramp voltage in response to the bias signal and the coarse ramp control signal; and
a second ramp voltage generation block suitable for generating the fine ramp voltage in response to the bias signal, the fine ramp control signal, and the slope correction signal.

15. The image sensing device of claim 14 , wherein the second ramp voltage generation block comprises:
a second source current generation unit suitable for generating a second source current corrected based on the first slope in response to a first bias signal and the slope correction signal, and generating a third bias signal corresponding to the second source current; and
a second ramp voltage generation unit suitable for generating a second mirror current that is varied by a fine unit in response to the third bias signal and the fine ramp control signal, and generating the fine ramp voltage based on the second mirror current.

16. The image sensing device of claim 15 , wherein the second source current generation unit comprises:
a second sinking section coupled between an output terminal of the third bias signal and a ground voltage terminal, wherein the second source current sinks to the gr

Assignees

• Sk Hynix Inc

Inventors

• Song Jung-Eun

Classifications

• H03K4/48 Primary

  using as active elements semiconductor devices (H03K4/787 - H03K4/84 take precedence) · CPC title

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• G05F3/24 Primary

  wherein the transistors are of the field-effect type only (G05F3/205, G05F3/26, G05F3/30 take precedence) · CPC title

• H04N5/374

  Electricity · mapped topic

• H04N5/378

  Electricity · mapped topic