Systems and methods for space vector pulse width modulation switching using boot-strap charging circuits

Patent metadata

Field	Value
Publication number	US-9774275-B2
Application number	US-201314422772-A
Country	US
Kind code	B2
Filing date	Aug 14, 2013
Priority date	Aug 22, 2012
Publication date	Sep 26, 2017
Grant date	Sep 26, 2017

Abstract

Platforms and techniques are provided for controlling a power inverter using space vector pulse width modulation (PWM) operation. The inverter converts a direct voltage (DC) power source to an alternating voltage (AC) output by controlling a set of three phase switches. A bootstrap capacitor is coupled to each switch. When each switch in the set of three phase switches is in a zero state, the coupled bootstrap capacitor can charge from the current delivered in a corresponding pulse width modulation (PWM) signal. The bootstrap capacitor can deliver stored power when a one (high) switch state is entered. Each switch can be maintained at a zero state, and thus charge the bootstrap capacitor, for at least two consecutive segments of the PWM cycle. Pre-charging of the bootstrap capacitor is ensured before power delivery is required.

First claim

What is claimed is:

1. A method of controlling a power inverter, comprising:
generating a set of pulse width modulation (PWM) signals for each of six space vectors, the set of pulse width modulation (PWM) signals comprising a set of three phase signals controlling a set of three phase switches connected across a DC power source;
configuring the set of pulse width modulation (PWM) signals to maintain at least one of the set of three phase signals to remain at a zero state for at least two consecutive modulation segments, each modulation segment comprising a plurality of clock cycles; and
generating a set of three phase alternating current (AC) outputs based on the set of six space vectors;
wherein generating the set of three-phase alternating voltage (AC) outputs comprises charging a set of bootstrap capacitors coupled to the set of three phase switches respectively driven by the set of three phase signals, the charging occurring during the at least one of the set of three phase signals remaining at the zero state for at least two consecutive modulation segments, each bootstrap capacitor having one leg connected directly to one side of the DC power source.

2. The method of claim 1 , wherein the set of three phase signals comprises a set of three phase signals configured to be one hundred twenty degrees out of phase.

3. The method of claim 1 , wherein the set of pulse width modulation (PWM) signals are encoded using a three-bit value.

4. The method of claim 1 , further comprising transmitting the set of three-phase alternating voltage (AC) outputs to a load.

5. The method of claim 4 , wherein the load comprises an electric motor.

6. The method of claim 5 , wherein the electric motor comprises at least one of an alternating (AC) induction motor, brushless direct (DC) motor, a switched reluctance motor, or a permanent magnet synchronous motor.

7. The method of claim 1 , wherein the at least two consecutive modulation segments comprises at least a portion of a third consecutive modulation segment.

8. The method of claim 1 , wherein each modulation segment comprises five clock cycles, the at least one of the set of three phase signals to remain at the zero state for at least ten consecutive clock cycles.

9. The method of claim 8 , wherein the at least one of the set of three phase signals to remain at the zero state for at least ten consecutive clock cycles remains at the zero state for more than ten consecutive clock cycles.

10. A system for controlling for a power inverter, comprising:
an interface to a set of three phase switches connected across a DC power source and to a load; and
a processor, communicating with the set of three phase switches and the load, the processor being configured to generate a set of pulse width modulation (PWM) signals for each of six pulse width modulation (PWM) vectors, the set of pulse width modulation (PWM) signals comprising a set of three phase signals controlling the set of three phase switches,
configuring the set of pulse width modulation (PWM) signals to maintain at least one of the set of three phase signals to remain at a zero state for at least two consecutive modulation segments, each modulation segment comprising a plurality of clock cycles,
generate a set of three phase alternating voltage (AC) outputs based on the set of six pulse width modulation vectors, and
transmit the set of three phase alternating voltage (AC) outputs to the load;
wherein generating the set of three-phase alternating voltage (AC) outputs comprises charging a set of bootstrap capacitors coupled to the set of three phase switches respectively driven by the set of three phase signals, the charging occurring during the at least one of the set of three phase signals remaining at the zero state for at least two consecutive modulation segments, each bootstrap capacitor having one leg coupled directly to one side of the DC power source.

11. The system of claim 10 , wherein the set of three phase signals comprises a set of three phase signals configured to be one hundred twenty degrees out of phase.

12. The system of claim 10 , wherein the set of pulse width modulation (PWM) signals are encoded using a three-bit value.

13. The system of claim 12 , wherein the load comprises an electric motor.

14. The system of claim 13 , wherein the electric motor comprises at least one of an alternating (AC) induction motor, brushless direct (DC) motor, a switched reluctance motor, or a permanent magnet synchronous motor.

15. The system of claim 10 , wherein the at least two consecutive modulation segments comprises at least a portion of a third consecutive modulation segment.

16. A method of controlling an electric motor, comprising:
generating a set of pulse width modulation (PWM) signals for each of six pulse width modulation (PWM) vectors, the set of pulse width modulation (PWM) signals comprising a set of three phase signals controlling a set of three phase switches connected across a DC power source;
configuring the set of pulse width modulation (PWM) signals to maintain at least one of the set of three phase signals to remain at a zero state for at least two consecutive modulation segments, each modulation segment comprising a plurality of clock cycles; and
controlling an operation of the electric motor using a set of three phase alternating current (AC) outputs based on the set of six pulse width modulation vectors;
wherein generating the set of three-phase alternating voltage (AC) outputs comprises charging a set of bootstrap capacitors coupled to the set of three phase switches respectively driven by the set of three phase signals, the charging occurring during the at least one of the set of three phase signals remaining at the zero state for at least two consecutive modulation segments, each bootstrap capacitor having one leg coupled directly to one side of the DC power source.

Assignees

• Carrier Corp

Inventors

• Perdikakis William
• Zhang Da
• Gietzold Thomas

Classifications

• H02P6/14

  Electronic commutators · CPC title

• H02M7/5395 Primary

  by pulse-width modulation · CPC title

• H02M1/0006

  Arrangements for supplying an adequate voltage to the control circuit of converters · CPC title

• H02M7/53876

  based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times · CPC title

• H02P27/08 Primary

  with pulse width modulation · CPC title