High quality factor capacitors and methods for fabricating high quality factor capacitors

Patent metadata

Field	Value
Publication number	US-9773862-B2
Application number	US-201615375137-A
Country	US
Kind code	B2
Filing date	Dec 11, 2016
Priority date	Feb 10, 2014
Publication date	Sep 26, 2017
Grant date	Sep 26, 2017

Abstract

Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape.

First claim

What is claimed is:

1. A method for fabricating a capacitor, comprising:
forming, on a substrate, a through-glass via (TGV) having a non-rectangular cross-section;
forming a first metal plate, wherein one end face of the TGV is coupled to the first metal plate;
forming a dielectric material on the first metal plate; and
forming, on the dielectric material, a second metal plate in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material,
wherein at least a part of the perimeter of the at least one overlapped region is curved, and the dielectric material, the first metal plate, and the second metal plate are formed external to the TGV without extending past a perimeter of the one end face of the TGV.

2. The method of claim 1 , wherein the TGV is formed substantially cylindrically-shaped and has an axis, and the at least one overlapped region has at least a portion of a ring shape that is substantially centered about the axis of the TGV.

3. The method of claim 2 , wherein the at least one overlapped region is formed in a shape of a closed ring substantially centered about the axis of the TGV.

4. The method of claim 2 , wherein the at least one overlapped region is formed as at least one of:
a plurality of portions of the ring shape;
substantially a quarter of the ring shape; and
substantially a half of the ring shape.

5. The method of claim 2 , wherein an inner radius of the ring shape is greater than an outer radius of the cylindrically-shaped TGV.

6. The method of claim 1 , wherein the first metal plate is formed substantially planar.

7. The method of claim 2 , wherein the at least one overlapped region is formed substantially in a plane extending from an outer radius of the ring shape.

8. A method for fabricating a capacitor, comprising:
forming, on a substrate, a through-glass via (TGV) having a non-rectangular cross-section;
forming a first metal plate, wherein one end face of the TGV is coupled to the first metal plate;
forming a dielectric material on the first metal plate; and
forming, on the dielectric material, a second metal plate in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material,
wherein at least a part of the perimeter of the at least one overlapped region is not straight or an intersection of two straight lines, and the dielectric material, the first metal plate, and the second metal plate are formed external to the TGV without extending past a perimeter of the one end face of the TGV.

9. The method of claim 8 , wherein the TGV is formed substantially cylindrically-shaped and has an axis, and the at least one overlapped region is formed in at least a portion of a ring shape that is substantially centered about the axis of the TGV.

10. The method of claim 9 , wherein the at least one overlapped region is formed in a shape of a closed ring substantially centered about the axis of the TGV.

11. The method of claim 9 , wherein the at least one overlapped region is formed in at least one of:
a plurality of portions of the ring shape;
substantially a quarter of the ring shape; and
substantially a half of the ring shape.

12. The method of claim 9 , wherein an inner radius of the ring shape is greater than an outer radius of the cylindrically-shaped TGV.

13. The method of claim 8 , wherein the first metal plate is formed substantially planar.

14. The method of 9 , wherein the at least one overlapped region is formed substantially in a plane extending from an outer radius of the ring shape.

Assignees

• Qualcomm Inc

Inventors

• Yun Changhan Hobie
• Kim Daeik Daniel
• Zuo Chengjie
• Kim Jonghae
• Velez Mario Francisco
• Kidwell Jr Donald William
• Lasiter Jon Bradley
• Lai Kwan-Yu
• Kim Jitae
• Shenoy Ravindra Vaman

Classifications

• H10W70/635

  Through-vias · CPC title

• H10W70/095

  of vias therein · CPC title

• H10W20/496

  Capacitor integral with wiring layers · CPC title

• H10W20/023

  the interconnections being through-semiconductor vias · CPC title

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title