Semiconductor device and electronic device

US9773832B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9773832-B2
Application numberUS-201514961181-A
CountryUS
Kind codeB2
Filing dateDec 7, 2015
Priority dateDec 10, 2014
Publication dateSep 26, 2017
Grant dateSep 26, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A semiconductor device including pixels arranged in a matrix of n rows and m columns, in which the pixels in the m-th column are shielded from light, is provided.

First claim

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What is claimed is: 1. A semiconductor device comprising: pixels arranged in a matrix of n rows and m columns, where each of n and m is a natural number of 2 or more, the pixels each including a first transistor, a second transistor, a third transistor, a photoelectric conversion element, and a first capacitor; a plurality of first circuits; and a second circuit, wherein one electrode of the photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of the first transistor, wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor, wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the third transistor, wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one electrode of the first capacitor, wherein the other electrode of the first capacitor is electrically connected to a first wiring provided in each row, wherein one of a source electrode and a drain electrode of the third transistor is electrically connected to a second wiring provided in each column, wherein the plurality of first circuits are electrically connected to the second wirings electrically connected to pixels in first to (m−1)th columns, wherein the first wiring is capable of supplying a different potential to each row, wherein the second wiring electrically connected to pixels in an m-th column is electrically connected to a first power supply line, wherein the second wirings electrically connected to the pixels in the first to (m−1)th columns, the plurality of first circuits, and the first power supply line are electrically connected to the second circuit, wherein the pixels in the m-th column are shielded from light, and wherein a third wiring is electrically connected to one of the second wirings through a fourth transistor and is electrically connected to another of the second wirings through a fifth transistor. 2. The semiconductor device according to claim 1 , wherein each of the plurality of first circuits functions as a constant-current circuit, and the second circuit functions as an output circuit. 3. The semiconductor device according to claim 1 , wherein each of the plurality of first circuits includes a sixth transistor, a seventh transistor, and a second capacitor, wherein one of a source electrode and a drain electrode of the sixth transistor is electrically connected to one of a source electrode and a drain electrode of the seventh transistor, wherein the one of the source electrode and the drain electrode of the sixth transistor is electrically connected to the second wiring electrically connected to the pixels in any of the first to (m−1)th columns, wherein the other of the source electrode and the drain electrode of the sixth transistor is electrically connected to one electrode of the second capacitor, wherein the other of the source electrode and the drain electrode of the sixth transistor is electrically connected to a second power supply line, wherein the other of the source electrode and the drain electrode of the seventh transistor is electrically connected to a gate electrode of the sixth transistor, and wherein the other of the source electrode and the drain electrode of the seventh transistor is electrically connected to the other electrode of the second capacitor. 4. The semiconductor device according to claim 1 , wherein the second wiring electrically connected to the pixels in any of the first to (m−1)th columns and one of the plurality of first circuits are electrically connected to a first current mirror circuit. 5. The semiconductor device according to claim 1 , wherein the second circuit includes an operational amplifier, wherein a first input terminal of the operational amplifier is electrically connected to the second wiring electrically connected to the pixels in any of the first to (m−1)th columns and one of the plurality of first circuits, and wherein a second input terminal of the operational amplifier is electrically connected to the first power supply line. 6. The semiconductor device according to claim 5 , wherein the second circuit includes a second current mirror circuit and a third current mirror circuit, wherein an input transistor of the second current mirror circuit is electrically connected to the second wiring electrically connected to the pixels in any of the first to (m−1)th columns and one of the plurality of first circuits, wherein an output transistor of the second current mirror circuit is electrically connected to the first input terminal of the operational amplifier, wherein an input transistor of the third current minor circuit is electrically connected to the second wiring electrically connected to the pixels in the m-th column, and wherein an output transistor of the third current mirror circuit is electrically connected to the second input terminal of the operational amplifier. 7. The semiconductor device according to claim 1 , wherein the photoelectric conversion element contains selenium or a compound containing selenium in a photoelectric conversion layer. 8. The semiconductor device according to claim 1 , wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor includes an oxide semiconductor in an active layer, and wherein the oxide semiconductor includes In, Zn, and M, where M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf. 9. An electronic device comprising: the semiconductor device according to claim 1 , and a display device. 10. The semiconductor device according to claim 1 , wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor includes an oxide semiconductor in an active layer, and wherein the oxide semiconductor includes In, Zn, and Ga. 11. A semiconductor device comprising: a first pixel; a second pixel adjacent to the first pixel; a third pixel adjacent to the first pixel; a fourth pixel adjacent to the second pixel and the third pixel, wherein each of the first pixel, the second pixel, the third pixel, and the fourth pixel comprises a capacitor and a first transistor whose gate is electrically connected to one electrode of the capacitor; a first wiring electrically connected to the other electrode of the capacitor of the first pixel and the other electrode of the capacitor of the second pixel; a second wiring electrically connected to one of a source and a drain of the first transistor of the first pixel and one of a source and a drain of the first transistor of the third pixel; a third wiring electrically connected to the other electrode of the capacitor of the third pixel and the other electrode of the capacitor of the fourth pixel; a fourth wiring electrically connected to one of a source and a drain of the first transistor of the second pixel and one of a source and a drain of the first transistor of the fourth pixel; a circuit comprising a second transistor, a third transistor and a fifth wiring, wherein the fifth wiring is electrically connected to the second wiring through the second transistor and is electrically connected to the fourth wiring through the third transistor. 12. The semiconductor device according to claim 11 , wherein each of the first transistor, the second transistor, and the third transistor includes an oxide semiconductor in an active layer, and wherein the oxid

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What does patent US9773832B2 cover?
A semiconductor device including pixels arranged in a matrix of n rows and m columns, in which the pixels in the m-th column are shielded from light, is provided.
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H01L27/14643. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 26 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).