Quantum information processing

Patent metadata

Field	Value
Publication number	US-9773208-B2
Application number	US-201615095507-A
Country	US
Kind code	B2
Filing date	Apr 11, 2016
Priority date	Apr 12, 2015
Publication date	Sep 26, 2017
Grant date	Sep 26, 2017

Abstract

Quantum information processing apparatus and methods are described. The apparatus comprises a device for defining a qubit and a reflectometry circuit for reading out a state of the qubit. The device comprises a semiconductor nanowire extending along a first direction having first and second obtuse or acute edges running along the first direction, gate dielectric overlying the first and second edges of the nanowire and a split gate running across a section of the nanowire in a second, transverse direction, the split gate comprising first and second gates overlying the first and second edges respectively. The reflectometry circuit comprises a resonator coupled to the first or second gate.

First claim

The invention claimed is:

1. A quantum information processing apparatus comprising:
a device for defining a qubit, the device comprising:
a semiconductor nanowire extending along a first direction having first and second obtuse or acute edges running along the first direction;
gate dielectric underlying or overlying the first and second edges of the nanowire; and
a split gate running across the nanowire in a second, transverse direction, the split gate comprising first and second gates underlying or overlying the first and second edges respectively;

a reflectometry circuit for reading out the state of the qubit, the circuit comprising:
a resonator coupled to the first or second gate.

2. The apparatus according to claim 1 , wherein the device further comprises:
first and second spacers spaced apart along the nanowire so as to constrain lengths of the edges.

3. The apparatus according to claim 1 , wherein the device comprises:
at least two split gates spaced along the nanowire along the first direction.

4. The apparatus according to claim 1 , wherein the device further comprises:
a conductive substrate; and
a dielectric layer disposed on the conductive substrate,

wherein the semiconductor nanowire is supported on the dielectric layer.

5. The apparatus according to claim 1 , wherein the device further comprises:
a dielectric layer overlying the semiconductor nanowire and split gate; and
a conductive layer overlying the dielectric layer.

6. The apparatus according to claim 1 , wherein the device further comprises:
a ferromagnet disposed closer to the first or second edge so as to generate a magnetic field gradient between the first and second edges.

7. The apparatus according to claim 1 , wherein the device further comprises:
a dielectric layer overlying the split gate; and
a conductive bus line running along the second direction over the split gate.

8. The apparatus according to claim 1 , wherein the resonator comprises:
an LC circuit comprising an inductor having first and second terminals, the first terminal of the inductor coupled to the first or second gate.

9. The apparatus according to claim 1 , wherein the reflectometry circuit further comprises:
a radio frequency signal source arranged to provide an excitation signal to the resonator; and
a phase detector arranged to measure phase change in the resonator.

10. The apparatus according to claim 1 , wherein:
the device comprises:
first and second split gates spaced along the nanowire along the first direction;

the reflectometry circuit comprises:
first and second radio frequency signal sources;
a combiner for combining feed signals from the first and second radio frequency signal sources;
first and second phase detectors;
a splitter for splitting a reflected signal and feeding the signal to the first and second phase detectors;
first and second resonators, each resonator coupled to a one of the first and second gates of a one of the two split gates respectively; and
a coupler for allowing feed signals to be supplied to the first and second LC circuits and to receive reflected signals from the first and second LC circuits.

11. The apparatus according to claim 1 , comprising:
first and second devices comprising first and second different nanowires; and
a common gate shared by the first and second devices, the common gate providing the first gate of the split gate of the first device and the second gate of the split gate of the second device.

12. The apparatus according to claim 11 , wherein the first and second nanowires are laterally spaced apart.

13. The apparatus according to claim 11 , wherein the first and second nanowires are vertically spaced apart.

14. A method of operating the apparatus according to claim 1 , the method comprising:
forming first and second quantum dots in the device so as to form a qubit;
initialising the qubit in an initial state;
performing at least one transformation on the initial state which results in a final state; and
reading out the final state using the reflectometry circuit.

15. The method according to claim 14 , wherein reading out the final state comprises:
detuning the qubit to a minimum or maximum in energy band and then reading the final state.

Assignees

• Hitachi Ltd

Inventors

• Betz Andreas
• Gonzalez-Zalba Miguel Fernando

Classifications

• B82Y10/00

  Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title

• H01L39/025

  Electricity · mapped topic

• G06N99/002 Primary

  Physics · mapped topic

• H10D48/3835

  Semiconductor qubit devices comprising a plurality of quantum mechanically interacting semiconductor quantum dots, e.g. Loss-DiVincenzo spin qubits · CPC title

• H10D30/402 Primary

  Single electron transistors; Coulomb blockade transistors · CPC title