Efficient digital microphone receiver process and system

US9769550B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9769550-B2
Application numberUS-201314073652-A
CountryUS
Kind codeB2
Filing dateNov 6, 2013
Priority dateNov 6, 2013
Publication dateSep 19, 2017
Grant dateSep 19, 2017

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  1. Title

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  5. First independent claim

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Abstract

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A method for processing a bitstream starts by shifting a bitstream of a first sample of a signal into a buffer. The buffer also holds bits of one or more additional bitstreams for one or more additional samples of the signal. Bits of a first half of the buffer are incrementally compared to corresponding bits of a second half of the buffer. Each bit of the first half of the buffer is compared to a corresponding bit of the second half of the buffer. A computation is performed on each bit of the first half of the buffer that is equal to a corresponding bit of the second half of the buffer. The results of the computations are summed to determine an output value for the first sample of the signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for signal processing, the method comprising: sampling a signal received from a microphone; shifting a bitstream of a first sample of the signal into a buffer, wherein the buffer also stores bits of one or more additional bitstreams for one or more additional samples of the signal; incrementally comparing bits of a first half of the buffer to corresponding bits of a second half of the buffer, wherein each bit of the first half of the buffer is compared to a corresponding bit of the second half of the buffer; performing a computation on each bit of the first half of the buffer that is equal to a corresponding bit of the second half of the buffer; and summing the results of the computations to determine an output value for the first sample of the signal. 2. The method of claim 1 , wherein the bitstream is an oversampled pulse density modulated (PDM) 1-bit bitstream, and wherein said signal is an audio signal. 3. The method of claim 1 , wherein the comparing comprises performing an exclusive OR logical operation. 4. The method of claim 1 , wherein the processing the bitstream is implemented with a finite impulse response (FIR) filter. 5. The method of claim 1 , wherein each computation comprises performing four multiply-accumulate operations. 6. The method of claim 1 , wherein the comparing and the computing are completed before bits of a next bitstream are shifted into the buffer. 7. The method of claim 1 , wherein a processor performing the comparing and the computing is idle after the comparing and the computing are completed and before bits of a next bitstream are shifted into the buffer. 8. The method of claim 1 , wherein the signal is an audio signal. 9. The method of claim 1 , wherein during periods of time when the bitstream is approximately a DC average signal, the performing a computation is performed on less than half of the bits of the first half of the buffer. 10. The method of claim 1 , wherein the buffer is filled with bits of four additional bitstreams for four additional samples of the signal. 11. An audio system comprising: an audio input device configured to receive audio signals; a sampling device configured to sample the audio signals; a processor; and memory coupled to the processor and storing instructions that, when executed by the processor, implement: a plurality of buffers each operable to store bitstreams of a plurality of samples of corresponding audio signals, wherein a first buffer holds bitstreams of a plurality of samples of a first audio signal; a coefficient generator operable to incrementally generate a plurality of coefficients; a plurality of comparators each coupled to a corresponding buffer, the comparators each operable to incrementally compare bits of a first half of a corresponding buffer to corresponding bits of a second half of the corresponding buffer and output an enable signal when a bit of the first half of the corresponding buffer is equal to a corresponding bit of the second half of the corresponding buffer; and a plurality of summation modules each coupled to the coefficient generator and to a corresponding comparator of the plurality of comparators and each operable to receive and sum a currently generated coefficient of the plurality of coefficients with a running sum of coefficients when an enable signal is received from the corresponding comparator, wherein each summed plurality of coefficients is an output value for a sample of a corresponding audio signal. 12. The audio system of claim 11 , wherein the coefficient generator is synchronized with the plurality of comparators, and wherein each incrementally generated coefficient received by the plurality of summation modules corresponds with bits currently being compared by each of the plurality of comparators. 13. The audio system of claim 11 , wherein a bitstream of a sample of an audio signal comprises an oversampled pulse density modulated (PDM) bitstream. 14. The audio system of claim 11 , wherein a running sum of coefficients of a first summation module of the plurality of summation modules comprises a sum of coefficients received by the first summation module when an enable signal from a first comparator of the plurality of comparators is being generated. 15. The audio system of claim 11 , wherein each buffer is operable to hold bitstreams of five samples of a corresponding audio signal. 16. The audio system of claim 11 , wherein a comparator of the plurality of comparators is operable to perform an exclusive OR logical operation. 17. The audio system of claim 11 , wherein a coefficient is generated for each pair of compared bits. 18. The audio system of claim 11 , wherein a summation module of the plurality of summation modules is further operable to multiply a currently received coefficient by +1 or −1 before summing with a running sum of coefficients as defined by a sign of the bits compared by a corresponding comparator, and wherein a digital 0 is considered a −1 and a digital 1 is considered a +1. 19. An audio system comprising: means for sampling an audio signal received from an audio input device; means for shifting a bitstream of a first sample of the audio signal into a buffer, wherein the buffer also stores bits of one or more additional bitstreams for one or more additional samples of the audio signal; means for incrementally comparing bits of a first half of the buffer to corresponding bits of a second half of the buffer, wherein each bit of the first half of the buffer is compared to a corresponding bit of the second half of the buffer; means for performing a computation on each bit of the first half of the buffer that is equal to a corresponding bit of the second half of the buffer; and means for summing the results of the computations to determine an output value for the first sample of the audio signal. 20. The audio system of claim 19 , wherein the means for incrementally comparing bits and the means for performing a computation are idle after the comparing and computing are completed and before bits of a next bitstream of a next sample of an audio signal are shifted into the buffer.

Assignees

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Classifications

  • Transducers incorporated or for use in hand-held devices, e.g. mobile phones, PDA's, camera's · CPC title

  • Sinc or gaussian filters (H03H17/0671 takes precedence) · CPC title

  • H04R1/005Primary

    using digitally weighted transducing elements · CPC title

  • Mems transducers or their use · CPC title

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What does patent US9769550B2 cover?
A method for processing a bitstream starts by shifting a bitstream of a first sample of a signal into a buffer. The buffer also holds bits of one or more additional bitstreams for one or more additional samples of the signal. Bits of a first half of the buffer are incrementally compared to corresponding bits of a second half of the buffer. Each bit of the first half of the buffer is compared to…
Who is the assignee on this patent?
Nvidia Corp
What technology area does this patent fall under?
Primary CPC classification H04R1/005. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).