Systems and methods for reducing reflected power during state transitions by using radio frequency values
US-2016307736-A1 · Oct 20, 2016 · US
US9768774B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9768774-B2 |
| Application number | US-201414320223-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 30, 2014 |
| Priority date | Jun 30, 2014 |
| Publication date | Sep 19, 2017 |
| Grant date | Sep 19, 2017 |
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A circuit may include an output circuit with an output circuit output impedance and a control circuit. The output circuit may include a driver circuit that includes an output terminal and a driver circuit output impedance at the output terminal. The output circuit may also include an adjustable impedance circuit that includes an adjustable impedance. The adjustable impedance circuit may be coupled between the output terminal of the driver circuit and a signal transmission line. The output circuit output impedance may be based on the driver circuit output impedance and the adjustable impedance. The control circuit may be coupled to the adjustable impedance circuit. The control circuit may be configured to adjust the adjustable impedance of the adjustable impedance circuit such that the output circuit output impedance approximately equals a particular impedance.
Opening claim text (preview).
What is claimed is: 1. A circuit, comprising: an output circuit with an output circuit output impedance, the output circuit includes: a driver circuit that includes an output terminal and a driver circuit output impedance at the output terminal; and an adjustable impedance circuit that includes an adjustable impedance, the adjustable impedance circuit coupled between the output terminal of the driver circuit and a signal transmission line, the output circuit output impedance based on the driver circuit output impedance and the adjustable impedance; and a control circuit coupled to the adjustable impedance circuit, the control circuit including: a first portion configured to generate and to use a first impedance adjust voltage and to provide the first impedance adjust voltage to the adjustable impedance circuit; and a second portion configured to use the first impedance adjust voltage, to generate and use a second impedance adjust voltage, and to provide the second impedance adjust voltage to the adjustable impedance circuit and to the first portion, wherein the first portion provides the first impedance adjust voltage to the second portion and uses the second impedance adjust voltage and wherein the control circuit is configured to adjust the adjustable impedance of the adjustable impedance circuit based on the first impedance adjust voltage and the second impedance adjust voltage such that the output circuit output impedance approximately equals a particular impedance. 2. The circuit of claim 1 , wherein the output circuit is configured to be coupled to the signal transmission line with an input impedance that approximately equals the particular impedance, wherein the adjustable impedance circuit includes an adjustable resistance coupled in series between the driver circuit and the signal transmission line. 3. The circuit of claim 2 , further comprising a fixed resistance coupled in series between the driver circuit and the signal transmission line and in parallel with the adjustable impedance circuit. 4. The circuit of claim 1 , wherein the driver circuit is configured to drive an output signal on the output terminal and the adjustable impedance circuit includes a first transistor configured to pass the output signal in a first state and a second transistor configured to pass the output signal in a second state, wherein the control circuit is configured to adjust a first transistor output impedance of the first transistor to approximately equal the particular impedance and to adjust a second transistor output impedance of the second transistor to approximately equal the particular impedance. 5. The circuit of claim 4 , wherein: the driver circuit includes a voltage mode driver circuit; the first transistor is a p-type transistor coupled to the output terminal; and the second transistor is an n-type transistor coupled to the output terminal. 6. The circuit of claim 1 , wherein: the first portion includes: a first impedance circuit with a first impedance circuit impedance related to the particular impedance; a first replica output circuit that is a scaled replica of the output circuit, wherein the first replica output circuit includes a first replica driver circuit and a first replica adjustable impedance circuit; and a first comparison circuit configured to generate the first impedance adjust voltage based on a comparison of a first voltage generated based on the first impedance circuit and a second voltage generated based on the first replica output circuit; and the second portion includes: a second impedance circuit with a second impedance circuit impedance related to the particular impedance; a second replica output circuit that is a scaled replica of the output circuit, wherein the second replica output circuit includes a second replica driver circuit and second replica adjustable impedance circuit; and a second comparison circuit configured to generate the second impedance adjust voltage based on a comparison of a third voltage generated by the second impedance circuit and a fourth voltage generated by the second replica output circuit. 7. The circuit of claim 6 , wherein: the first voltage is generated based on the first impedance circuit and a replica first load circuit that is a scaled replica of a load circuit coupled to the output circuit; the second voltage is generated based on the first replica output circuit and a second load circuit that is a scaled replica of the load circuit, wherein a first replica adjustable impedance of the first replica adjustable impedance circuit is adjusted based on the first impedance adjust voltage and the second impedance adjust voltage; the third voltage is generated based on the second impedance circuit and a third load circuit that is a scaled replica of the load circuit coupled to the output circuit; and the fourth voltage is generated based on the second replica output circuit and a fourth load circuit that is a scaled replica of the load circuit, wherein a second replica adjustable impedance of the second replica adjustable impedance circuit is adjusted based on the second impedance adjust voltage and the first impedance adjust voltage. 8. The circuit of claim 6 , wherein the first impedance circuit impedance is related to the particular impedance based on a first ratio that is equal to a second ratio between widths of first and second transistors of the adjustable impedance circuit and widths of replica first and second transistors of the first replica adjustable impedance circuit. 9. The circuit of claim 6 , wherein the first replica output circuit and the second replica output circuit are scaled replicas of the output circuit. 10. The circuit of claim 1 , wherein the output circuit is a first output circuit and the circuit is configured for differential signals, wherein the circuit further includes: a second output circuit with a second output circuit output impedance, the second output circuit includes: a second driver circuit that includes a second output terminal and a second driver circuit output impedance at the second output terminal; and a second adjustable impedance circuit that includes a second adjustable impedance, the second adjustable impedance circuit coupled between the second output terminal of the second driver circuit and a second signal transmission line, the second output circuit output impedance based on the second driver circuit output impedance and the second adjustable impedance, wherein the control circuit is coupled to the second adjustable impedance circuit, the control circuit configured to adjust the second adjustable impedance of the second adjustable impedance circuit such that the second output circuit output impedance approximately equals the particular impedance. 11. The circuit of claim 1 wherein the particular impedance is 50 ohms. 12. A circuit, comprising: an output circuit with an output circuit output impedance, the output circuit includes an adjustable impedance circuit that includes an adjustable impedance, the output circuit output impedance based on the adjustable impedance; a first replica output circuit configured to output a first voltage, the first replica output circuit being a replica of the output circuit; a first comparison circuit configured to generate a first impedance adjust voltage based on a comparison of the first voltage and a second voltage related to a particular impedance; a second replica output circuit configured to output a third voltage, the second replica output circuit being a replica of the output circuit; and a second comparison circuit configured to generate a second impedance adjust voltage based on a comparison of
Modifications of input or output impedance · CPC title
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