Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9768318-B2
Application number	US-201615019004-A
Country	US
Kind code	B2
Filing date	Feb 9, 2016
Priority date	Feb 12, 2015
Publication date	Sep 19, 2017
Grant date	Sep 19, 2017

Abstract

A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first oxide semiconductor over a first insulator;
forming a second oxide semiconductor over the first oxide semiconductor;
etching part of the first oxide semiconductor and part of the second oxide semiconductor to form an island-shaped oxide semiconductor layer comprising the first oxide semiconductor and the second oxide semiconductor;
forming, over the first insulator and the island-shaped oxide semiconductor layer, a first conductor comprising a first region, a second region, a third region, a fourth region, and a fifth region;
forming a resist over the second region, the third region, the fourth region, and the fifth region;
etching the first region of the first conductor;
reducing the resist to form a resist over the fourth region and the fifth region;
etching the first region, the second region, and the third region of the first conductor and then etching the entire first region of the first conductor to form a first conductive layer and a second conductive layer;
forming a second conductor over the first insulator, the first conductive layer, and the second conductive layer;
forming a second photoresist over the second conductor;
etching the second conductor to form a third conductive layer;
forming a second insulator over the first insulator and the third conductive layer;
forming an opening reaching a top surface of the first insulator and an opening reaching a top surface of the island-shaped oxide semiconductor layer in the second insulator and the third conductive layer to separate the third conductive layer into a fourth conductive layer and a fifth conductive layer;
forming a third oxide semiconductor over the second insulator and the island-shaped oxide semiconductor layer;
forming a third insulator over the third oxide semiconductor;
forming a third conductor over the third insulator;
etching part of the third conductor to form a sixth conductive layer; and
forming a fourth insulator over the second insulator and the sixth conductive layer.

2. The method for manufacturing a semiconductor device, according to claim 1 , wherein the third conductive layer is less likely to transmit oxygen than the first conductive layer and the second conductive layer.

3. The method for manufacturing a semiconductor device, according to claim 1 , wherein the third conductive layer is formed to cover a top surface and a side surface of the first conductive layer and a top surface and a side surface the second conductive layer.

4. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the steps of:
forming, over the third conductor, a fourth conductor that is less likely to transmit oxygen than the third conductor;
forming, below the third conductor, a fifth conductor that is less likely to transmit oxygen than the third conductor; and
etching part of the third conductor, part of the fourth conductor, and part of the fifth conductor to form a seventh conductive layer.

5. The method for manufacturing a semiconductor device, according to claim 1 , further comprising the step of:
forming, as the fourth insulator, an insulator that is less likely to transmit oxygen than the first insulator, the second insulator, and the third insulator.

6. The method for manufacturing a semiconductor device, according to claim 1 , wherein the second insulator has a surface planarized by chemical mechanical polishing treatment.

7. The method for manufacturing a semiconductor device, according to claim 1 ,
wherein the fourth region comprises a sixth region and a seventh region,
wherein the fifth region comprises an eighth region and a ninth region,
wherein the seventh region faces the eighth region with the sixth conductive layer and the third insulator interposed between the seventh region and the eighth region, and
wherein the seventh region is thinner than the sixth region and the eighth region is thinner than the ninth region.

8. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first oxide semiconductor over a first insulator;
forming a second oxide semiconductor over the first oxide semiconductor;
etching part of the first oxide semiconductor and part of the second oxide semiconductor to form an island-shaped oxide semiconductor layer comprising the first oxide semiconductor and the second oxide semiconductor;
forming, over the first insulator and the island-shaped oxide semiconductor layer, a first conductor comprising a first region, a second region, a third region, a fourth region, and a fifth region;
forming a resist over the second region, the third region, the fourth region, and the fifth region;
etching the first region of the first conductor;
reducing the resist to form a resist over the fourth region and the fifth region;
etching the first region, the second region, and the third region of the first conductor and then etching the entire first region of the first conductor to form a first conductive layer and a second conductive layer;
forming a second conductor over the first insulator, the first conductive layer, and the second conductive layer;
forming a second photoresist over the second conductor;
etching the second conductor to form a third conductive layer;
forming a second insulator over the first insulator and the third conductive layer;
forming an opening reaching a surface of the first insulator and an opening reaching a surface of the island-shaped oxide semiconductor layer in the second insulator and the third conductive layer to separate the third conductive layer into a fourth conductive layer and a fifth conductive layer;
forming a third oxide semiconductor over the second insulator and the island-shaped oxide semiconductor layer;
forming a third insulator over the third oxide semiconductor;
forming a third conductor over the third insulator;
etching part of the third conductor to form a sixth conductive layer;
forming a fourth insulator over the second insulator and the sixth conductive layer using plasma comprising oxygen to add the oxygen in the plasma into the second insulator as excess oxygen;
performing heat treatment to move the excess oxygen to the second oxide semiconductor; and
forming a fifth insulator over the fourth insulator.

9. The method for manufacturing a semiconductor device, according to claim 8 , wherein the third conductive layer is less likely to transmit oxygen than the first conductive layer and the second conductive layer.

10. The method for manufacturing a semiconductor device, according to claim 8 , wherein the third conductive layer is formed to cover a top surface and a side surface of the first conductive layer and a top surface and a side surface of the second conductive layer.

11. The method for manufacturing a semiconductor device, according to claim 8 , further comprising the steps of:
forming, over the third conductor, a fourth conductor that is less likely to transmit oxygen than the third conductor;
forming, below the third conductor, a fifth conductor that is less likely to transmit oxygen than the third conductor; and
etching part of the third conductor, part of the fourth conductor, and part of the fifth conductor to form a seventh conductive layer.

12. The method for manufacturing a semiconductor device, according to claim 8 , further comprising the step of:
forming, as the fourth insulator, an insulator that is less likely to transmit oxygen than the first insulator, the second insulator, and the third insulator.

13. The method for manufacturing a semiconduct

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Asami Yoshinobu
• Okazaki Yutaka
• Kurata Motomu
• Tochibayashi Katsuaki
• Sasagawa Shinya
• Yoshizumi Kensuke
• Suzawa Hideomi

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P50/28

  of insulating materials · CPC title

• H10P14/68

  Organic materials, e.g. photoresists · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title