Method for producing semiconductor device and semiconductor device

US9768294B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9768294-B2
Application numberUS-201514753774-A
CountryUS
Kind codeB2
Filing dateJun 29, 2015
Priority dateApr 16, 2013
Publication dateSep 19, 2017
Grant dateSep 19, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor device includes a fin-shaped semiconductor layer, a first insulating film formed around the fin-shaped semiconductor layer, a first metal film formed around the first insulating film, a pillar-shaped semiconductor layer formed on the fin-shaped semiconductor layer, a gate insulating film formed around the pillar-shaped semiconductor layer, a gate electrode formed around the gate insulating film and made of a third metal, a gate line connected to the gate electrode, a second insulating film formed around a sidewall of an upper portion of the pillar-shaped semiconductor layer, and a second metal film formed around the second insulating film. The upper portion of the pillar-shaped semiconductor layer and the second metal film are connected to each other, and an upper portion of the fin-shaped semiconductor layer and the first metal film are connected to each other.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a fin-shaped semiconductor layer on a substrate; a first insulating film around the fin-shaped semiconductor layer; a first metal film around the first insulating film; a pillar-shaped semiconductor layer on the fin-shaped semiconductor layer; a gate insulating film around the pillar-shaped semiconductor layer; a gate electrode around the gate insulating film and made of a third metal; a gate line connected to the gate electrode; a second insulating film around a sidewall of an upper portion of the pillar-shaped semiconductor layer; and a second metal film around the second insulating film, wherein the upper portion of the pillar-shaped semiconductor layer and the second metal film are electrically connected to each other, and an upper portion of the fin-shaped semiconductor layer and the first metal film are electrically connected to each other. 2. The semiconductor device according to claim 1 , wherein the fin-shaped and pillar-shaped semiconductor layers are made of silicon. 3. The semiconductor device according to claim 2 , wherein the first metal film and the second metal film have a work function of 4.0 eV to 4.2 eV. 4. The semiconductor device according to claim 2 , wherein the first metal film and the second metal film have a work function of 5.0 eV to 5.2 eV. 5. The semiconductor device according to claim 1 , wherein the pillar-shaped semiconductor layer has a width equal to a length of a short side of the fin-shaped semiconductor layer.

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9768294B2 cover?
A semiconductor device includes a fin-shaped semiconductor layer, a first insulating film formed around the fin-shaped semiconductor layer, a first metal film formed around the first insulating film, a pillar-shaped semiconductor layer formed on the fin-shaped semiconductor layer, a gate insulating film formed around the pillar-shaped semiconductor layer, a gate electrode formed around the gate…
Who is the assignee on this patent?
Unisantis Elect Singapore Pte
What technology area does this patent fall under?
Primary CPC classification H01L29/7827. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).