Method for manufacturing semiconductor device

US9768281B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9768281-B2
Application numberUS-201514666753-A
CountryUS
Kind codeB2
Filing dateMar 24, 2015
Priority dateMar 12, 2009
Publication dateSep 19, 2017
Grant dateSep 19, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.

First claim

Opening claim text (preview).

The invention claimed is: 1. A manufacturing method of a semiconductor device comprising: forming an oxide semiconductor layer over a first insulating layer; forming a first conductive layer electrically connected to the oxide semiconductor layer; forming a second insulating layer over the oxide semiconductor layer and the first conductive layer; performing a first heat treatment before forming the second insulating layer; and performing a second heat treatment after forming the second insulating layer, wherein a hydrogen concentration in the second insulating layer is lower than a hydrogen concentration in the oxide semiconductor layer. 2. The manufacturing method according to claim 1 , wherein the first heat treatment is performed after forming the oxide semiconductor layer. 3. The manufacturing method according to claim 1 , wherein a source electrode and a drain electrode are formed from the first conductive layer. 4. The manufacturing method according to claim 1 , wherein the first heat treatment is performed at 100° C. to 500° C. 5. The manufacturing method according to claim 1 , wherein the second heat treatment is performed at 400° C. or lower. 6. The manufacturing method according to claim 1 , wherein the second insulating layer is formed by a sputtering method. 7. The manufacturing method according to claim 1 , wherein the hydrogen concentration in the second insulating layer is 1×10 21 atoms/cm 3 or lower. 8. A manufacturing method of a semiconductor device comprising: forming an oxide semiconductor layer over a first insulating layer; forming a first conductive layer electrically connected to the oxide semiconductor layer; forming a second insulating layer over the oxide semiconductor layer and the first conductive layer; forming a second conductive layer over the second insulating layer, the second conductive layer being electrically connected to the first conductive layer; performing a first heat treatment before forming the second insulating layer; and performing a second heat treatment after forming the second insulating layer, wherein a hydrogen concentration in the second insulating layer is lower than a hydrogen concentration in the oxide semiconductor layer. 9. The manufacturing method according to claim 8 , wherein the first heat treatment is performed after forming the oxide semiconductor layer, and wherein the second heat treatment is performed before forming the second conductive layer. 10. The manufacturing method according to claim 8 , wherein a source electrode and a drain electrode are formed from the first conductive layer, and wherein the second conductive layer is a pixel electrode. 11. The manufacturing method according to claim 8 , wherein the first heat treatment is performed at 100° C. to 500° C. 12. The manufacturing method according to claim 8 , wherein the second heat treatment is performed at 400° C. or lower. 13. The manufacturing method according to claim 8 , wherein the second insulating layer is formed by a sputtering method. 14. The manufacturing method according to claim 8 , wherein the hydrogen concentration in the second insulating layer is 1×10 21 atoms/cm 3 or lower.

Assignees

Inventors

Classifications

  • Oxides · CPC title

  • using physical deposition, e.g. vacuum deposition or sputtering · CPC title

  • Thermal treatments, e.g. annealing or sintering · CPC title

  • the material containing tantalum, e.g. Ta2O5 · CPC title

  • the material containing aluminium, e.g. Al2O3 · CPC title

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What does patent US9768281B2 cover?
An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insula…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/031. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).