Thin film transistor and manufacturing method thereof, display device
US-2016181437-A1 · Jun 23, 2016 · US
US9768274B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9768274-B2 |
| Application number | US-201514685243-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 13, 2015 |
| Priority date | Nov 25, 2014 |
| Publication date | Sep 19, 2017 |
| Grant date | Sep 19, 2017 |
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A method includes defining, on a surface of a material, a plurality of discrete portions of a surface as surface elements having at least one of a laterally-varying size, a laterally-varying shape, and a laterally-varying spacing. A plurality of portions of the material beneath the surface elements are doped with a single quantity of dopant material per element area. The dopant material within the material beneath the surface elements expands to provide a lateral gradient of dopant material in the material beneath the surface elements.
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What is claimed is: 1. A method comprising: defining, with a masking layer formed on a surface of a material, a plurality of discrete portions of a surface as surface elements, wherein the surface elements are arranged into a plurality of surface matrix cells having a laterally-varying density of open cells in accordance with a halftone gradient, and wherein the plurality of surface matrix cells are arranged in accordance with the halftone gradient into a plurality of halftone regions, wherein each region in the plurality of halftone regions has a different density of the open cells in the plurality of surface matrix cells, wherein a first region in the plurality of halftone regions has a first density of the open cells, a second region in the plurality of halftone regions has a second density of the open cells, and a third region in the plurality of halftone regions has a third density of the open cells, and wherein the first density is greater than the second density, and the second density is greater than the third density; doping a plurality of portions of the material beneath the surface elements with a single quantity of dopant material per element area; and expanding the dopant material within the material beneath the surface to provide a lateral gradient of dopant material in the material beneath the surface; and forming a source electrode and a drain electrode on the material to create a semiconductor device, wherein the material is a semiconductor material, and wherein a local dopant concentration proximate to the drain electrode of the semiconductor device is greater than a local dopant concentration proximate to the source electrode of the semiconductor device, and wherein the first region is disposed proximate to the drain electrode, and the third region is disposed proximate to the source electrode, and the second region is disposed between the first region and the third region. 2. The method of claim 1 wherein the masking layer includes at least one of an ion beam implantation mask or a diffusion mask, and wherein said doping of the plurality of portions of the material comprises one of implanting or diffusing the dopant material through the open cells. 3. The method of claim 2 wherein said open cells define the surface elements onto which said one of a dopant beam or an ion beam to penetrate the surface of the material and implant the dopant material, and wherein said one of the ion beam implantation mask or the diffusion mask screen said one of the dopant beam or the ion beam. 4. The method of claim 1 wherein the semiconductor material comprises one of p type semiconductor material or n type semiconductor material. 5. The method of claim 4 wherein the dopant material comprises one of p type dopant material or n type dopant material. 6. The method of claim 5 wherein a quantity of dopant material varies along a lateral channel of the semiconductor device. 7. The method of claim 6 wherein said doping the plurality of portions of the material beneath the surface elements form a plurality of doped regions of the semiconductor device. 8. The method of claim 7 wherein a quantity of the dopant material in each one of the plurality of doped regions in the lateral channel is defined by a local dopant concentration in said one of the plurality of doped regions. 9. The method of claim 8 wherein the plurality of doped regions in the lateral channel is formed between a source electrode and a drain electrode of the semiconductor device. 10. The method of claim 9 wherein the local dopant concentration proximate to the drain electrode of the semiconductor device forms a uniform concentration region, and wherein the local dopant concentration proximate to the source electrode of the semiconductor device is reduced with respect to the local dopant concentration proximate to the drain electrode by a radial gradient of dopant towards the source electrode. 11. The method of claim 10 wherein the semiconductor device is a high voltage switching device, wherein around 25% of an area proximate to the drain electrode is exposed to the doping material and around 5% of an area proximate to the source electrode is exposed to the doping material. 12. The method of claim 1 , wherein a density of the open cells in the plurality of surface matrix cells decreases radially from the drain to the source electrode. 13. The method of claim 1 , further comprising a fourth region in the plurality of halftone regions that has a fourth density of the open cells, and wherein the fourth region is laterally disposed between the third region and the second region, and wherein the fourth density is less than the second density and greater than the third density.
by ion implantation · CPC title
being group IV material · CPC title
within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase · CPC title
into Group IV semiconductors · CPC title
using masks · CPC title
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