Content based hardware security module assignment to virtual machines

US9767295B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9767295-B2
Application numberUS-201514941545-A
CountryUS
Kind codeB2
Filing dateNov 14, 2015
Priority dateFeb 13, 2015
Publication dateSep 19, 2017
Grant dateSep 19, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

At least one hardware security module out of a plurality of hardware security modules is assigned to a guest system. The at least one hardware security module out of the plurality of hardware security modules is configured with a master key. A data pattern is used for a challenge protocol adapted to prove that the at least one hardware security module out of the plurality of hardware security modules is configured with the master key. The at least one hardware security module including the master key is assigned to the guest system based on a positive outcome of the challenge protocol.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of assigning at least one hardware security module of a plurality of hardware security modules to a guest system, the method comprising: configuring at least one hardware security module of a plurality of hardware security modules with a master key; establishing, by a guest system, that the at least one hardware security module of the plurality of hardware security modules is configured with the master key, the establishing using, by the guest system, a data pattern for a challenge protocol to prove that the at least one hardware security module of the plurality of hardware security modules is configured with the master key, the challenge comprising: obtaining, by the guest system, an unencrypted guest key, an encrypted guest key, an unencrypted data pattern, and an encrypted data pattern, the encrypted guest key comprising the unencrypted guest key of the guest system encrypted using the master key, and the encrypted data pattern having been encrypted by the guest system using the unencrypted guest key; sending by the guest system, the encrypted guest key to the at least one hardware security module along with a guest data pattern, the guest data pattern being either the encrypted data pattern or the unencrypted data pattern; decrypting the encrypted guest key by the at least one hardware security module using the master key, and obtaining for return to the guest system a host data pattern, the host data pattern being the other of the encrypted data pattern or the unencrypted data pattern, the obtaining including using the unencrypted guest key by the at least one hardware security module on the guest data pattern; sending, by the at least one hardware security module, the host data pattern to the guest system; comparing, by the guest system, the host data pattern with at least one of the unencrypted data pattern or the encrypted data pattern to determine whether the challenge protocol has a positive outcome; and based on the establishing obtaining the positive outcome of the challenge protocol, assigning the at least one hardware security module of the plurality of hardware security modules configured with the master key to the guest system on a positive outcome of said challenge protocol. 2. The method of claim 1 , wherein the guest data pattern comprises the encrypted data pattern. 3. The method of claim 2 , wherein the decrypting comprises decrypting the encrypted data pattern by the at least one hardware security module using the decrypted guest key resulting in the unencrypted data pattern. 4. The method of claim 3 , wherein the challenge protocol comprises generating the positive outcome based on the guest system determining that the host data pattern by the at least one hardware security module comprises the unencrypted data pattern and is identical to the unencrypted data pattern before being encrypted. 5. The method of claim 1 , wherein the host data pattern comprises the encrypted data pattern, generated by the at least one hardware security module using the decrypted guest key. 6. The method of claim 5 , wherein the challenge protocol comprises generating the positive outcome based on the guest system determining that the encrypted data pattern generated by the at least one hardware security module is identical to the encrypted data pattern obtained by the guest system. 7. The method of claim 1 , wherein the configuring the at least one hardware security module, the establishing, and the assigning the at least one hardware security module out of the plurality of hardware security modules to the guest system are performed by trusted firmware. 8. The method of claim 1 , wherein the unencrypted data pattern is a random data pattern.

Assignees

Inventors

Classifications

  • Isolation or security of virtual machine instances · CPC title

  • G06F21/602Primary

    Providing cryptographic facilities or services · CPC title

  • Hypervisor-specific management and integration aspects · CPC title

  • Key transport or distribution, i.e. key establishment techniques where one party creates or otherwise obtains a secret value, and securely transfers it to the other(s) (network architectures or network communication protocols for key distribution in a packet data network H04L63/062) · CPC title

  • Guest-host, i.e. hypervisor is an application program itself, e.g. VirtualBox · CPC title

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Frequently asked questions

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What does patent US9767295B2 cover?
At least one hardware security module out of a plurality of hardware security modules is assigned to a guest system. The at least one hardware security module out of the plurality of hardware security modules is configured with a master key. A data pattern is used for a challenge protocol adapted to prove that the at least one hardware security module out of the plurality of hardware security m…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F21/602. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).