Effective power management for pluggable transceiver receiving hardware in network switching systems

Patent metadata

Field	Value
Publication number	US-9766689-B2
Application number	US-201314139987-A
Country	US
Kind code	B2
Filing date	Dec 24, 2013
Priority date	Dec 24, 2013
Publication date	Sep 19, 2017
Grant date	Sep 19, 2017

Abstract

A transceiver-receiving system, such as a network switch with pluggable transceivers, is built with hardware and machine logic so that power to certain components is turned off when the pluggable transceiver is not present in its plug in slot. The machine logic for handling the turning off an on of power is present on a processor on the board to which the plug-in slot is attached. The other hardware for handling the turning on and off of the power includes a communication line from the plug-in slot to the processor, and a set of switch(es) located on the power path for the component(s) to be turned on and off according to the presence of absence of the transceiver.

First claim

What is claimed is:

1. A method comprising:
providing a transceiver-receiving system comprising:
a first machine logic module;
a first receiving connector;
a first communication line;
a first power supply connected to a first powered component set via a first switch;
a switching-related powered transceiver signal processing component comprising a switch application specific integrated circuit (ASIC), wherein the first powered component set comprises a portion of the switch ASIC that includes serializer/deserializer (SerDes) blocks;
a data bus structured to connect the first receiving connector and the switching-related powered transceiver signal processing component;
a plurality of intermediate powered transceiver signal processing (IPTSP) components positioned in a path between the switching-related powered transceiver signal processing component and the first receiving connector, with each IPTSP component of the plurality of IPTSP components being in data communication with the data bus; and
a second power supply connected to the plurality of IPTSP components via a second switch;

receiving, from the first receiving connector through the first communication line and by the first machine logic module, a first signal indicating that a removable transceiver module has been removed from the first receiving connector;
controlling, by the first machine logic module in response to receipt of the first signal, the first switch to turn off stopping a flow of power from the first power supply to the first powered component set and to the first receiving connector; and
controlling, by the first machine logic module in response to receipt of the first signal, the second switch to turn off stopping a flow of power from the second power supply to all IPTSP components of the plurality of IPTSP components,
wherein the first switch is a solid state switch, and
wherein the second switch is a solid state switch.

2. The method of claim 1 , further comprising:
receiving, from the first receiving connector through the first communication line and by the first machine logic module, a second signal indicating that a removable transceiver module has been placed into the first receiving connector; and
controlling, by the first machine logic module in response to receipt of the second signal, the first switch to turn on restoring the flow of power from the first power supply to the first powered component set and to the first receiving connector.

3. The method of claim 2 , further comprising controlling, by the first machine logic module in response to receipt of the second signal, the second switch to turn on restoring the flow of power from the second power supply to all IPTSP components of the plurality of IPTSP components and to the first receiving connector, wherein the first switch comprises a metal oxide semiconductor field effect transistor (MOSFET).

4. The method of claim 1 , wherein the transceiver-receiving system further comprises a third power supply connected to the switch ASIC via a third switch, the method further comprising:
controlling, by the first machine logic module in response to receipt of the first signal, the third switch to turn off stopping a flow of power from the third power supply to a port sub-component of the switch ASIC that is coupled to the first receiving connector with a proviso that the switch ASIC is not completely powered down in response to the flow of power from the third power supply being stopped via the third switch being turned off;
receiving, from the first receiving connector through the first communication line and by the first machine logic module, a second signal indicating that a removable transceiver module has been placed into the first receiving connector;
controlling, by the first machine logic module in response to receipt of the second signal, the first switch to turn on restoring the flow of power from the first power supply to the first powered component set and to the first receiving connector;
controlling, by the first machine logic module in response to receipt of the second signal, the second switch to turn on restoring the flow of power from the second power supply to all IPTSP components of the plurality of IPTSP components; and
controlling, by the first machine logic module in response to receipt of the second signal, the third switch to turn on restoring the flow of power from the third power supply to the port sub-component of the switch ASIC,
wherein the first switch comprises a metal oxide semiconductor field effect transistor (MOSFET),
wherein the first receiving connector is sized, shaped, connected, structured and/or located to receive at least one type of removable transceiver module selected from a group consisting of: small form-factor pluggable, small form-factor pluggable plus, and quad small form-factor pluggable plus, and
wherein the plurality of IPTSP components are selected from a group consisting of: a physical layer component, a serializer/deserializer component, a re-timer component, and an extended parallel server component.

5. The method of claim 1 , wherein the first powered component set comprises one or more components selected from a group consisting of: a physical layer component, a serializer/deserializer component, a re-timer component, a buffer memory component, and an extended parallel server component.

6. The method of claim 1 , wherein the first receiving connector is sized, shaped, connected, structured and/or located to receive at least one type of removable transceiver module selected from a group consisting of: small form-factor pluggable, small form-factor pluggable plus, and quad small form-factor pluggable plus.

7. The method of claim 1 , wherein the plurality of IPTSP components are selected from a group consisting of: a physical layer component, a serializer/deserializer component, a re-timer component, and an extended parallel server component.

8. The method of claim 1 , wherein the transceiver-receiving system further comprises a third power supply connected to the switch ASIC via a third switch, the method further comprising:
controlling, by the first machine logic module in response to receipt of the first signal, the third switch to turn off stopping a flow of power from the third power supply to a port sub-component of the switch ASIC that is coupled to the first receiving connector with a proviso that the switch ASIC is not completely powered down in response to the flow of power from the third power supply being stopped via the third switch being turned off;
receiving, from the first receiving connector through the first communication line and by the first machine logic module, a second signal indicating that a removable transceiver module has been placed into the first receiving connector; and
controlling, by the first machine logic module in response to receipt of the second signal, the third switch to turn on restoring the flow of power from the third power supply to the port sub-component of the switch ASIC.

9. A transceiver-receiving system, the system comprising:
a first machine logic module;
a first receiving connector;
a first communication line;
a first power supply connected to a first powered component set via a first switch, wherein the first powered component set does not include the first receiving connector;
a switching-related powered transceiver signal processing component comprising a switch application specific integrated circuit (ASIC), wherein the first powered component set comprises a portion of the switch ASIC that includes serializer/deserializer (SerDes) blocks;
a data bus structured to connect the first receiving connector and the switching-related powered transceiver signal processing

Assignees

• Lenovo Entpr Solutions Singapore Pte Ltd

Inventors

• Assar Behzad
• Flint Stephen J
• Hogan Michael W J
• Pearson Mark

Classifications

• Y02B60/126

  Cross-Sectional Technologies · mapped topic

• G06F1/3278

  Power saving in modem or I/O interface · CPC title

• G06F1/3287 Primary

  by switching off individual functional units in the computer system · CPC title

• Y02B60/1282

  Cross-Sectional Technologies · mapped topic

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title