Power module substrate, heat-sink-attached power module substrate, and heat-sink-attached power module

Patent metadata

Field	Value
Publication number	US-9764416-B2
Application number	US-201414761697-A
Country	US
Kind code	B2
Filing date	Jan 20, 2014
Priority date	Jan 22, 2013
Publication date	Sep 19, 2017
Grant date	Sep 19, 2017

Abstract

The power module substrate includes a circuit layer that is formed on a first surface of a ceramic substrate, and a metal layer that is formed on a second surface of the ceramic substrate, in which the metal layer has a first aluminum layer that is bonded to the second surface of the ceramic substrate and a first copper layer that is bonded to the first aluminum layer by solid-phase diffusion bonding.

First claim

The invention claimed is:

1. A power module substrate comprising:
a ceramic substrate;
a circuit layer that is formed on one surface of the ceramic substrate; and
a metal layer that is formed on the other surface of the ceramic substrate,
wherein the metal layer includes:
a first aluminum layer that is bonded to the other surface of the ceramic substrate,
a first copper layer that is bonded to the first aluminum layer by solid-phase diffusion bonding, and
a first intermetallic compound layer that is formed at a first bonding interface between the first aluminum layer and the first copper layer and that has a plurality of intermetallic compounds of Cu and Al,
wherein the plurality of intermetallic compounds in the first intermetallic compound layer are formed in a layered state and are laminated along the first bonding interface, and
the plurality of intermetallic compounds in the first intermetallic compound layer have a structure in which a θ phase, a η2 phase, and at least one phase selected from the group consisting of a ζ2 phase, a δ phase, and γ2 phase are sequentially laminated from the first aluminum layer toward the first copper layer.

2. The power module substrate according to claim 1 ,
wherein the circuit layer includes:
a second aluminum layer that is bonded to one surface of the ceramic substrate, and
a second copper layer that is bonded to the second aluminum layer by solid-phase diffusion bonding.

3. A heat-sink-attached power module substrate comprising:
the power module substrate according to claim 1 ; and
a heat sink,
wherein the first copper layer and the heat sink are bonded.

4. The heat-sink-attached power module substrate according to claim 3 ,
wherein the heat sink is composed of Cu or a Cu alloy and the power module substrate and the heat sink are bonded by soldering.

5. The heat-sink-attached power module substrate according to claim 3 ,
wherein the heat sink is composed of Al or an Al alloy with Ni plating formed thereon and the power module substrate and the heat sink are bonded by soldering.

6. A heat-sink-attached power module comprising:
the heat-sink-attached power module substrate according to claim 3 ; and
a semiconductor device that is bonded to one surface of the circuit layer.

7. A heat-sink-attached power module comprising:
the heat-sink-attached power module substrate according to claim 4 ; and
a semiconductor device that is bonded to one surface of the circuit layer.

8. A heat-sink-attached power module comprising:
the heat-sink-attached power module substrate according to claim 5 ; and
a semiconductor device that is bonded to one surface of the circuit layer.

9. The power module substrate according to claim 1 , wherein
a thickness of the first intermetallic compound layer is 1 μm to 80 μm.

10. The power module substrate according to claim 1 , wherein
oxides are dispersed in a layered state between the first aluminum layer and the first copper layer.

11. The power module substrate according to claim 10 , wherein
the oxides are dispersed in a layered state along the first bonding interface between the first intermetallic compound layer and the first copper layer.

12. The power module substrate according to claim 1 , wherein
an average crystal grain size of the first aluminum layer is 500 μm or more, and
an average crystal grain size of the first copper layer is 50 μm to 200 μm.

13. The power module substrate according to claim 2 , wherein
an average crystal grain size of the second aluminum layer is 500 μm or more, and
an average crystal grain size of the second copper layer is 50 μm to 200 μm.

14. The power module substrate according to claim 2 , wherein
a second intermetallic compound layer is formed at a second bonding interface between the second aluminum layer and the second copper layer and has a plurality of intermetallic compounds of Cu and Al,
wherein the plurality of intermetallic compounds in the second intermetallic compound layer are formed in a layered state and are laminated along the second bonding interface.

15. The power module substrate according to claim 14 , wherein
the plurality of intermetallic compounds in the second intermetallic compound layer have a structure in which a θ phase, a η2 phase, and at least one phase selected from the group consisting of a ζ2 phase, a δ phase, and a γ2 phase are sequentially laminated from the second aluminum layer toward the second copper layer.

16. The power module substrate according to claim 2 , wherein
oxides are dispersed in a layered state between the second aluminum layer and the second copper layer.

17. The power module substrate according to claim 16 , wherein
the oxides are dispersed in a layered state along the second bonding interface between the second intermetallic compound layer and the second copper layer.

18. The power module substrate according to claim 15 , wherein
oxides are dispersed in a layered state between the second aluminum layer and the second copper layer.

19. The power module substrate according to claim 18 , wherein
the oxides are dispersed in a layered state inside one of the ζ 2 phase, the δ phase, and a γ 2 phase along the second bonding interface between the second intermetallic compound layer and the second copper layer.

20. The power module substrate according to claim 14 , wherein
a thickness of the second intermetallic compound layer is 1 μm to 80 μm.

21. A power module substrate comprising:
a ceramic substrate;
a circuit layer that is formed on one surface of the ceramic substrate; and
a metal layer that is formed on the other surface of the ceramic substrate,
wherein the metal layer includes:
a first aluminum layer that is bonded to the other surface of the ceramic substrate,
a first copper layer that is bonded to the first aluminum layer by solid-phase diffusion bonding, and
a first intermetallic compound layer that is formed at a first bonding interface between the first aluminum layer and the first copper layer and that has a plurality of intermetallic compounds of Cu and Al,
wherein the plurality of intermetallic compounds in the first intermetallic compound layer are formed in a layered state and are laminated along the first bonding interface,
wherein an average crystal grain size of the first aluminum layer is 500 μm or more, and
wherein an average crystal grain size of the first copper layer is 50 μm to 200 μm.

22. The power module substrate according to claim 21 ,
wherein the circuit layer includes
a second aluminum layer that is bonded to one surface of the ceramic substrate, and
a second copper layer that is bonded to the second aluminum layer by solid-phase diffusion bonding.

23. A heat-sink-attached power module substrate comprising:
the power module substrate according to claim 21 ; and
a heat sink,
wherein the first copper layer and the heat sink are bonded.

24. A heat-sink-attached power module comprising:
the heat-sink-attached power module substrate according to claim 23 ; and
a semiconductor device that is bonded to one surface of the circuit layer.

25. The power module substrate according to claim 22 , wherein
an average crystal grain size of the second aluminum layer is 500 μm or more, and
an average crystal grain size of the second copper layer is 50 μm to 200 μm.

Assignees

• Mitsubishi Materials Corp

Inventors

• Nagase Toshiyuki
• Nagatomo Yoshiyuki
• Terasaki Nobuyuki

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W40/611

  Bolts or screws · CPC title

• H10W40/258

  Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence) · CPC title

• H10W40/255

  having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

• H10W40/47

  by flowing liquids, e.g. forced water cooling · CPC title