Circuit board, optoelectronic component and arrangement of optoelectronic components

US9763330B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9763330-B2
Application numberUS-201414165996-A
CountryUS
Kind codeB2
Filing dateJan 28, 2014
Priority dateJan 28, 2013
Publication dateSep 12, 2017
Grant dateSep 12, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit board for an optoelectronic semiconductor chip includes an electrically conductive first metal foil, a first electrically insulating foil, an electrically conductive second metal foil, wherein the first electrically insulating foil is applied to the first metal foil at a top side of the first metal foil and mechanically connects thereto, the first electrically insulating foil has a recess in which the first metal foil is exposed, the recess electrically conductively fixes the optoelectronic semiconductor chip to the first metal foil within the recess, the second metal foil is applied at a top side of the first electrically insulating foil, the top side facing away from the first metal foil, and mechanically connects to the electrically insulating foil, the first electrically insulating foil is free of the second metal foil at least in the region of the recess, and the second metal foil electrically contacts the optoelectronic semiconductor chip.

First claim

Opening claim text (preview).

The invention claimed is: 1. An optoelectronic component comprising: an optoelectronic semiconductor chip; and a circuit board comprising: an electrically conductive first metal foil; a first electrically insulating foil; and an electrically conductive second metal foil; wherein the first electrically insulating foil is applied to the first metal foil at a top side of the first metal foil and mechanically connects thereto; the first electrically insulating foil has a recess in which the first metal foil is exposed; the optoelectronic semiconductor chip is located inside the recess: the recess electrically conductively fixes the optoelectronic semiconductor chip to the first metal foil within the recess; the second metal foil is applied at a top side of the first electrically insulating foil, said top side facing away from the first metal foil, and mechanically connects to said electrically insulating foil; the first electrically insulating foil is free of the second metal foil at least in the region of the recess; the second metal foil electrically contacts the optoelectronic semiconductor chip, the first and second metal foils have a thickness of at least 20 μm to at most 400 μm, and the optoelectronic semiconductor chip has a height larger than a combined thickness of the second metal foil and the first electrically insulating foil so that the optoelectronic semiconductor chip protrudes from the recess and above the second metal foil. 2. The component according to claim 1 , wherein the first and second metal foils connect to the electrically insulating foil by an adhesive. 3. The component according to claim 1 , wherein the first electrically insulating foil, apart from the recess, completely covers the first metal foil at its top side, and the recess completely surrounds material of the first electrically insulating foil in lateral directions. 4. The component according to claim 1 , wherein the first and second metal foils are formed by aluminum foil. 5. The component according to claim 1 , further comprising a second electrically insulating foil applied to the first metal foil at an underside of the first metal foil, said underside facing away from the first electrically insulating foil and mechanically connects to said first metal foil. 6. The component according to claim 5 , wherein the second electrically insulating foil has an adhesive layer at its underside facing away from the first metal foil. 7. The optoelectronic component according to claim 1 , wherein the optoelectronic semiconductor chip electrically conductively connects to the second metal foil by a contact element comprising a contact wire fixed to the optoelectronic semiconductor chip and the second metal foil. 8. The optoelectronic component according to claim 1 , wherein the optoelectronic semiconductor chip is surrounded by a potting body and the potting body directly contacts the first metal foil and the first electrically insulating foil. 9. An arrangement of optoelectronic components comprising: at least two optoelectronic components according to claim 1 , wherein a second of the optoelectronic components is arranged on a first of the optoelectronic components such that the first metal foil of the second optoelectronic component covers the second metal foil of the first optoelectronic component in places and the two metal foils electrically conductively and mechanically connect to one another, and the first and second optoelectronic components electrically connect in series. 10. The arrangement according to claim 9 , wherein three or more of the optoelectronic components are arranged one above another, and the optoelectronic components electrically connect in series via an electrically conductive and mechanical connection of the first metal foil of one of the optoelectronic components to the second metal foil of the directly underlying optoelectronic component. 11. The arrangement according to claim 9 , wherein all optoelectronic components overlap one another within a connection region and the optoelectronic semiconductor chips of the optoelectronic components do not overlap. 12. The arrangement according to claim 9 , wherein the optoelectronic semiconductor chips are arranged along at least one imaginary line which is an imaginary circle or an imaginary spiral. 13. The component according to claim 1 , wherein the electrically conductive first metal foil is a thin sheet, and lateral dimensions in directions parallel to a main extension plane of said sheet are greater than the thickness of the sheet in a vertical dimension running orthogonal to the main extension plane of the sheet. 14. The component according to claim 1 , wherein the first electrical insulating foil is a thin sheet, and lateral dimensions in directions parallel to a main extension plane of said sheet are greater than the thickness of the sheet in a vertical dimension running orthogonal to the main extension plane of the sheet. 15. The component according to claim 1 , wherein the second metal foil is a thin sheet and lateral dimensions in directions parallel to a main extension plane of said sheet are greater than the thickness of the sheet in a vertical dimension running orthogonal to the main extension plane of the sheet. 16. An arrangement of optoelectronic components comprising: at least two optoelectronic components according to claim 1 , wherein a second of the optoelectronic components is arranged on a first of the optoelectronic components such that the first metal foil of the second optoelectronic component covers the second metal foil of the first optoelectronic component in places and the two metal foils electrically conductively and mechanically to one another, the first and second optoelectronic components electrically connect in series, and the optoelectronic components are arranged along at least one imaginary line which is an imaginary circle or an imaginary spiral. 17. The arrangement according to claim 9 , wherein each circuit board is rectangularly shaped and the recesses with the optoelectronic semiconductor chips are each arranged in an edge region of the circuit boards, all optoelectronic components overlap one another within a connection region, the optoelectronic semiconductor chips of the optoelectronic components do not overlap, and the optoelectronic components are arranged in a fan-shape or star-shape. 18. An optoelectronic component comprising: an optoelectronic semiconductor chip; and a circuit board comprising: an electrically conductive first metal foil; a first electrically insulating foil; and an electrically conductive second metal foil; wherein the first electrically insulating foil is applied to the first metal foil at a top side of the first metal foil and mechanically connects thereto; the first electrically insulating foil has a recess in which the first metal foil is exposed; the optoelectronic semiconductor chip is located inside the recess; the recess electrically conductively fixes the optoelectronic semiconductor chip to the first metal foil within the recess; the second metal foil is applied at a top side of the first electrically insulating foil, said top side facing away from the first metal foil, and mechanically connects to said electrically insulating foil; the first electrically insulating foil is free of the second metal foil at least in the region of the recess; the optoelectronic semiconductor chip electrically conductively connects to the second metal foil by a contact element comprising a contact wire fixed

Assignees

Inventors

Classifications

  • the connected ends being wedge-shaped · CPC title

  • the connected ends being ball-shaped · CPC title

  • Wire bonding · CPC title

  • H05K1/184Primary

    associated with components inserted in holes through the PCBs and wherein terminals of the components are connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes · CPC title

  • Leadless chip, e.g. chip capacitor or resistor · CPC title

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What does patent US9763330B2 cover?
A circuit board for an optoelectronic semiconductor chip includes an electrically conductive first metal foil, a first electrically insulating foil, an electrically conductive second metal foil, wherein the first electrically insulating foil is applied to the first metal foil at a top side of the first metal foil and mechanically connects thereto, the first electrically insulating foil has a re…
Who is the assignee on this patent?
Osram Gmbh
What technology area does this patent fall under?
Primary CPC classification H05K1/184. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).