Solid-state imaging device and imaging apparatus

Patent metadata

Field	Value
Publication number	US-9762867-B2
Application number	US-201615273289-A
Country	US
Kind code	B2
Filing date	Sep 22, 2016
Priority date	Oct 11, 2011
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity.
The solid-state imaging device includes a semiconductor layer 11 in which a surface side becomes a circuit formation surface, photoelectric conversion units PD 1 and PD 2 of two layers or more that are stacked and formed in the semiconductor layer 11 , and a longitudinal transistor Tr 1 in which a gate electrode 21 is formed to be embedded in the semiconductor layer 11 from a surface 15 of the semiconductor layer 11 . The photoelectric conversion unit PD 1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion 21 A of the gate electrode 21 of the longitudinal transistor Tr 1 embedded in the semiconductor substrate 11 and is connected to a channel formed by the longitudinal transistor Tr 1.

First claim

The invention claimed is:

1. A solid-state imaging device comprising:
a semiconductor layer including;
first and second photoelectric conversion units that are stacked in the semiconductor layer; and
a longitudinal transistor having a gate electrode that is embedded in the semiconductor layer from a first surface of the semiconductor layer;

an organic photoelectric conversion unit that is arranged over a second surface of the semiconductor layer, wherein the second surface is a light incident surface of the semiconductor layer; and
a wiring layer disposed between the organic photoelectric conversion unit and the second surface of the semiconductor layer,
wherein a charge generated in the organic photoelectric conversion unit is transferred to a first floating diffusion formed at a side of the first surface of the semiconductor layer via the wiring layer.

2. The solid-state imaging device according to claim 1 , further comprising:
a charge accumulation region, wherein the gate electrode of the longitudinal transistor is between the second photoelectric conversion unit and the charge accumulation region.

3. The solid-state imaging device according to claim 2 , wherein the organic photoelectric conversion unit includes a first electrode, an organic photoelectric conversion layer, and a second electrode.

4. The solid-state imaging device according to claim 3 , wherein the charge accumulation region is electrically connected to the second electrode of the organic photoelectric conversion unit.

5. The solid-state imaging device according to claim 3 , wherein the wiring layer is connected to the second electrode of the organic photoelectric conversion unit.

6. The solid-state imaging device according to claim 5 , wherein the wiring layer connected to the second electrode of the organic photoelectric conversion unit has a cross-section of a cross shape.

7. The solid-state imaging device according to claim 6 , further comprising:
a light shielding film, wherein the light shielding film is at least partially disposed between the organic photoelectric conversion unit and the second surface of the semiconductor layer, wherein the light shielding film and the wiring layer are configured to block light.

8. The solid-state imaging device according to claim 7 , wherein an aperture is formed between the light shielding film and the wiring layer.

9. The solid-state imaging device according to claim 1 , wherein the first photoelectric conversion unit is formed over a portion of the gate electrode of the longitudinal transistor and is electrically connected to the longitudinal transistor.

10. The solid-state imaging device according to claim 9 , further comprising:
a charge read circuit, wherein the charge read circuit is disposed at the side of the first surface of the semiconductor layer,
wherein a charge is generated in the first photoelectric conversion unit, and the charge is transferred to the charge read circuit via the gate electrode.

11. The solid-state imaging device according to claim 10 , wherein the charge is transferred to the charge read circuit via the gate electrode during a charge read period.

12. The solid-state imaging device according to claim 9 , wherein the first photoelectric conversion unit is adjacent to the second surface of the semiconductor layer.

13. The solid-state imaging device according to claim 12 , wherein the second photoelectric conversion unit is between the first photoelectric conversion unit and the first surface of the semiconductor layer.

14. The solid-state imaging device according to claim 13 , wherein the gate electrode of the longitudinal transistor extends from the first surface of the semiconductor layer to the first photoelectric conversion unit.

15. The solid-state imaging device according to claim 1 , wherein the organic photoelectric conversion unit has an area larger than the area of the first photoelectric conversion unit.

16. The solid-state imaging device according to claim 1 , wherein the organic photoelectric conversion unit is sensitive to green light.

17. The solid-state imaging device according to claim 16 , wherein the organic photoelectric conversion unit transmits blue and red light.

18. The solid-state imaging device according to claim 17 , wherein the first photoelectric conversion unit is sensitive to blue light.

19. The solid-state imaging device according to claim 18 , wherein the second photoelectric conversion unit is sensitive to red light.

20. The solid-state imaging device according to claim 1 , wherein the first photoelectric conversion unit is between the gate electrode of the longitudinal transistor and the second surface of the semiconductor layer.

21. The solid-state imaging device according to claim 1 , further comprising:
a second floating diffusion, wherein the second floating diffusion is formed at a side of the first surface of the semiconductor layer.

22. The solid-state imaging device according to claim 1 , further comprising:
a plurality of pixels, wherein one pixel of the plurality of pixels includes the first and second photoelectric conversion units and at least part of the organic photoelectric conversion unit.

23. The solid-state imaging device according to claim 1 , wherein an area of the first photoelectric conversion unit is greater than an area of the second photoelectric conversion unit.

24. The solid-state imaging device according to claim 23 , wherein an area of the organic photoelectric conversion unit is greater than the area of the first photoelectric conversion unit.

25. The solid-state imaging device according to claim 1 , wherein the semiconductor layer is silicon.

26. The solid-state imaging device according to claim 1 , wherein the imaging device is a back surface radiation type structure.

27. An electronic apparatus, comprising:
a solid-state imaging device;
an optical system that forms image light on the solid-state imaging device; and
a signal processing circuit that processes an output signal of the solid-state imaging device, the solid-state imaging device including:
a semiconductor layer including;
first and second photoelectric conversion units that are stacked in the semiconductor layer; and
a longitudinal transistor having a gate electrode that is embedded in the semiconductor layer from a first surface of the semiconductor layer,

an organic photoelectric conversion unit that is arranged over a second surface of the semiconductor layer, wherein the second surface is a light incident surface of the semiconductor layer,
a wiring layer disposed between the organic photoelectric conversion unit and the second surface of the semiconductor layer,
wherein a charge generated in the organic photoelectric conversion unit is transferred to a first floating diffusion formed at a side of the first surface of the semiconductor layer via the wiring layer.

Assignees

• Sony Corp

Inventors

• Yamaguchi Tetsuji

Classifications

• H04N25/70

  SSIS architectures; Circuits associated therewith · CPC title

• H04N23/88

  for colour balance, e.g. white-balance circuits or colour temperature control · CPC title

• H04N25/71

  Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors · CPC title

• H04N25/711

  Time delay and integration [TDI] registers; TDI shift registers · CPC title

• H04N23/75

  by influencing optical camera components · CPC title