Method for evaluating an available path bitrate based on an acknowledgement path selection

Patent metadata

Field	Value
Publication number	US-9762472-B2
Application number	US-201113642344-A
Country	US
Kind code	B2
Filing date	Apr 14, 2011
Priority date	Apr 21, 2010
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

A method for evaluating an available bitrate over a path among one of at least two paths linking a first endpoint and a second endpoint, the path being called an evaluation path, is disclosed. The first endpoint is configured for sending data packets to the second endpoint, the second endpoint is configured for sending at each data packet reception an acknowledgment message to the first endpoint through one of the at least two path selected at each data packet reception. The method comprises, at the first endpoint, steps of:
inserting a flag in a first data packet out of the data packets to be transmitted to the second endpoint through the evaluation path; sending said first data packet through the evaluation path; measuring and recording a sending time of the first data packet from said first endpoint; receiving an acknowledgment message sent by the second endpoint through the evaluation path for acknowledging reception of the first data packet at said second endpoint; measuring and recording an arrival time of said acknowledgment message at said first endpoint; assessing the available bitrate from an interval between the sending time and the arrival time and from the size of said first data packet.

A method for sending at a second endpoint an acknowledgement message over a path among one of at least two paths linking a first endpoint and said second endpoint is further disclosed. Associated device for evaluating an available bitrate and device for sending at a second endpoint an acknowledgement message are disclosed.

First claim

The invention claimed is:

1. A method for evaluating at a first endpoint an available bitrate over an evaluation path among at least two paths linking the first endpoint and a second endpoint, said method comprising:
sending data packets by said first endpoint to said second endpoint;
receiving by said first endpoint an acknowledgment message for each sent data packet from said second endpoint via one of the at least two paths selected for each sent data packet according to a path acknowledgement strategy determined by said second endpoint;
setting a single reserve bit in a first data packet out of said data packets to be transmitted to said second endpoint through the evaluation path;
sending said first data packet through the evaluation path;
measuring and recording a sending time of the first data packet from said first endpoint;
receiving said acknowledgment message from said second endpoint via said evaluation path for acknowledging reception of said first data packet at said second endpoint, interrupting said path acknowledgement strategy when said single reserve bit is set in said first data packet and receiving said acknowledgement message from said second endpoint via a path among the at least two paths according to said path acknowledgement strategy for acknowledging reception of said first data packet at said second endpoint when said single reserve bit is not set in said first data packet;
measuring and recording an arrival time of said acknowledgment message received through said evaluation path at said first endpoint, when said single reserve bit is set in said first data packet; and
obtaining the available bitrate from an interval between the sending time and the arrival time and from the size of said first data packet.

2. The method according to claim 1 , wherein when a second evaluation of an available bitrate is realized on said evaluation path by using a second data packet having a size different from the size of the first packet, the method further comprises assessing a packet preparation duration and a delivery speed per unitary packet size over the evaluation path.

3. The method according to claim 1 , wherein said single reserve bit insertion has no effect on size of said first data packet.

4. The method according to claim 1 , said data packets comprising a header, wherein the single reserve bit is inserted in a reserved bit of the header of the first or second data packet.

5. The method according to claim 1 , wherein a transport protocol is used for transporting data packets from the first endpoint to the second endpoint through said at least two paths.

6. The method according to claim 5 , wherein said transport protocol is SCTP.

7. A method, comprising:
sending at a second endpoint an acknowledgment message over an evaluation path among one of at least two paths linking a first endpoint and said second endpoint, said second endpoint receiving data packets from said first endpoint, said second endpoint sending at each data packet reception said acknowledgment message to said first endpoint through one of the at least two paths selected at each data packet reception for said data packet according to a path acknowledgement strategy determined by said second endpoint, wherein the method further comprises:
receiving a data packet from said first endpoint via any of the paths;
sending said acknowledgment message to said first endpoint for acknowledging the reception of said data packet at said second endpoint through a same path as the same path where said data packet is received, interrupting said path acknowledgement strategy when said received data packet comprises a single reserve bit set; and
sending said acknowledgement message to said first endpoint for acknowledging the reception of said data packet at said second endpoint through a path, among the at least two paths, according to said path acknowledgement strategy when said received data packet comprises said single reserve bit not set.

8. A device for evaluating an available bitrate over an evaluation path among one of at least two paths linking a first endpoint and a second endpoint, said device comprising:
a processor;
a memory;
wherein the processor is coupled to the memory, the processor being configured to:
send data packets from said first endpoint to said second endpoint, receive an acknowledgment message for each sent data packet from said second endpoint via one of the at the least two paths selected for each sent data packet according to a path acknowledgement strategy determined by said second endpoint;
set a single reserve bit in a first data packet before said data packet is sent to said second endpoint through the evaluation path;
measure and record a sending time of said first data packet from said first endpoint;
receive said acknowledgment message from said second endpoint via said evaluation path for acknowledging reception of said first data packet at said second endpoint, interrupting said path acknowledgement strategy when said single reserve bit is set in said first data packet and receive said acknowledgment message from said second endpoint through a path among the at least two paths according to said path acknowledgement strategy for acknowledging reception of said first data packet at said second endpoint when said single reserve bit is not set in said first data packet;
measure and record an arrival time at the first endpoint of said acknowledgment message, received through said evaluation path, when said single reserve bit is set in said first data packet; and
obtain the available bitrate from an interval between the sending time and the arrival time and from the size of said first data packet.

9. The device according to the claim 8 , wherein said processor is further configured to assess a packet preparation duration and a delivery speed per unitary packet size over the evaluation path from results of two successive evaluations of the available bitrate over a path.

10. The device according to the claim 8 , wherein said first endpoint uses SCTP as a transport protocol for sending data packets from first endpoint to said second endpoint.

11. The device according to the claim 8 , wherein said single reserve bit is located in one reserved bit of the header of said first data packet.

12. The device according to claim 8 , wherein said device is located in said first endpoint.

13. A device, comprising:
a processor;
a memory;
wherein the processor is coupled to the memory, the processor being configured to:
send an acknowledgment message over an evaluation path among at least two paths linking a first endpoint and a second endpoint, said second endpoint receiving data packets from said first endpoint, said second endpoint sending at each data packet reception said acknowledgment message to said first endpoint through one of the at least two paths selected at each data packet reception for said data packet according to a path acknowledgement strategy determined by said second endpoint;
receive a data packet from said first endpoint via any of the at least two paths;
send said acknowledgment message to said first endpoint for acknowledging the reception of said data packet at said second endpoint through a same path as the same path where said data packet is received, interrupting said path acknowledgement strategy when said received data packet comprises a single reserve bit set; and
send said acknowledgement message to said first endpoint for acknowledging the reception of said data packet at said second endpoint through a path, among the at least two paths, according to said path acknowledgement strategy when said received data packet

Assignees

• Bichot Guillaume
• Gouache Stephane
• Bsila Amine
• Thomson Licensing

Inventors

• Bichot Guillaume
• Gouache Stephane
• Bsila Amine

Classifications

• H04L43/50 Primary

  Testing arrangements · CPC title

• H04L69/14

  Multichannel or multilink protocols · CPC title

• H04L65/80 Primary

  Responding to QoS · CPC title

• H04L45/24

  Multipath · CPC title

• H04L65/608

  Electricity · mapped topic