Synchronization timing loop detection systems and methods

Patent metadata

Field	Value
Publication number	US-9762340-B1
Application number	US-201213363684-A
Country	US
Kind code	B1
Filing date	Feb 1, 2012
Priority date	Feb 1, 2012
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

A synchronization timing loop detection method includes monitoring an active timing reference for a flapping event at a network element, incrementing a counter for each detected flapping event, determining if the counter exceeds a threshold over a predetermined time period, and, if the counter exceeds the threshold, declaring a possible timing loop on the active timing reference. The flapping event can include the active timing reference being active followed by inactive due to synchronization status messaging and one of a logical and physical timing loop on the active timing reference. A synchronization timing loop detection system and a network element for synchronization timing loop detection for the synchronization timing loop detection method are also disclosed.

First claim

What is claimed is:

1. A synchronization timing loop detection method, comprising:
monitoring an active timing reference for a flapping event at a network element, wherein the flapping event is detected by the network element based on detecting oscillations of the active timing reference at the network element, wherein the flapping event comprises the active timing reference being active followed by inactive and back to active, and wherein the flapping event is due to synchronization status messaging and one of a logical and physical timing loop on the active timing reference;
incrementing a counter for each detected flapping event;
determining if the counter exceeds a threshold of flapping events over a predetermined time period; and
if the counter exceeds the threshold, declaring a possible timing loop on the active timing reference.

2. The method of claim 1 , further comprising:
if the counter exceeds the threshold, locking the active timing reference out and raising an alarm to a management system communicatively coupled to the network element.

3. The method of claim 1 , wherein the network element comprises an Optical Transport Network element and the active timing reference is a synchronous client in an Optical Transport Network line.

4. The method of claim 3 , wherein the synchronous client comprises one of a Synchronous Optical Network (SONET) line, a Synchronous Digital Hierarchy (SDH) line, and Synchronous Ethernet.

5. The method of claim 1 , wherein the active timing reference comprises one of an external timing reference connected to the network element and a line timing reference received by the network element.

6. The method of claim 1 , further comprising:
prior to the monitoring, switching to the active timing reference, wherein prior to the switching, the active timing reference is inactive and with one of a logical and a physical timing loop disposed thereon; and
subsequent to the switching, detecting the one of a logical and a physical timing loop through the monitoring, the incrementing, the determining, and the declaring steps.

7. A synchronization timing loop detection system, comprising:
a timing complex coupled to a plurality of timing references as inputs thereto;
a switching protection mechanism to maintain one of the plurality of timing references as an active reference; and
circuitry implementing synchronization timing loop detection on the active timing reference, wherein the circuitry is configured to:
monitor an active timing reference for a flapping event, wherein the flapping event is detected based on detecting oscillations of the active timing reference, wherein the flapping event comprises the active timing reference being active followed by inactive and back to active, wherein the flapping event is due to synchronization status messaging and one of a logical and physical timing loop on the active timing reference;
increment a counter for each detected flapping event;
determine if the counter exceeds a threshold of flapping events over a predetermined time period; and
if the counter exceeds the threshold, declare a possible timing loop on the active timing reference.

8. The system of claim 7 , wherein the circuitry is further configured to:
if the counter exceeds the threshold, lock the active timing reference out and raise an alarm to a management system communicatively coupled to the network element.

9. The system of claim 7 , wherein the timing complex is disposed in an Optical Transport Network element and the active timing reference is a synchronous client in an Optical Transport Network line.

10. The system of claim 9 , wherein the synchronous client comprises one of a Synchronous Optical Network (SONET) line, a Synchronous Digital Hierarchy (SDH) line, and Synchronous Ethernet.

11. The system of claim 7 , wherein the active timing reference comprises one of an external timing reference connected to the timing complex and a line timing reference received by the timing complex.

12. The system of claim 7 , wherein the circuitry is further configured to:
prior to the monitoring, switching to the active timing reference, wherein prior to the switching, the active timing reference is inactive and with one of a logical and a physical timing loop disposed thereon; and
subsequent to the switching, detect the one of a logical and a physical timing loop through the monitor, the increment, the determine, and the declare steps.

13. A network element for synchronization timing loop detection, comprising:
at least one line module comprising a plurality of ports;
a timing complex coupled to a plurality of timing references from the plurality of ports as input thereto;
a switching protection mechanism to maintain one of the plurality of timing references as an active reference; and
circuitry implementing synchronization timing loop detection on the active timing reference, wherein the circuitry is configured to:
monitor the active timing reference for a flapping event, wherein the flapping event is detected by the network element based on detecting oscillations of the active timing reference at the network element, wherein the flapping event comprises the active timing reference being active followed by inactive and back to active, and wherein the flapping event is due to synchronization status messaging and one of a logical and physical timing loop on the active timing reference;
increment a counter for each detected flapping event;
determine if the counter exceeds a threshold of flapping events over a predetermined time period; and
if the counter exceeds the threshold, declare a possible timing loop on the active timing reference.

14. The network element of claim 13 , wherein the circuitry is further configured to:
if the counter exceeds the threshold, lock the active timing reference out and raise an alarm to a management system communicatively coupled to the network element.

15. The network element of claim 13 , wherein the network element is an Optical Transport Network element and the active timing reference is a synchronous client in an Optical Transport Network line, and wherein the synchronous client comprises one of a Synchronous Optical Network (SONET) line, a Synchronous Digital Hierarchy (SDH) line, and Synchronous Ethernet.

16. The network element of claim 13 , wherein the active timing reference comprises one of an external timing reference connected to the timing complex and a line timing reference received by the timing complex.

17. The network element of claim 13 , wherein the circuitry is further configured to:
prior to the monitoring, switching to the active timing reference, wherein prior to the switching, the active timing reference is inactive and with one of a logical and a physical timing loop disposed thereon; and
subsequent to the switching, detect the one of a logical and a physical timing loop through the monitor, the increment, the determine, and the declare steps.

Assignees

• Derrico Mark J
• Ciena Corp

Inventors

• Derrico Mark J

Classifications

• H04J3/0658

  Clock or time synchronisation among packet nodes · CPC title

• H04J3/06 Primary

  Synchronising arrangements {(for television systems H04N5/04; bit-synchronisation H04L7/00)} · CPC title

• H04J3/0647

  Synchronisation among TDM nodes · CPC title

• H04J3/02

  Details (electronic switching or gating H03K17/00) · CPC title

• H04J3/14 Primary

  Monitoring arrangements {(for SDH/SONET rings H04J3/085)} · CPC title