Integrated circuits and transponder circuitry with improved ask demodulation

Patent metadata

Field	Value
Publication number	US-9762282-B1
Application number	US-201715459738-A
Country	US
Kind code	B1
Filing date	Mar 15, 2017
Priority date	Mar 15, 2017
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

Disclosed examples include an RF transponder circuit with signal input nodes, a rectifier circuit with a power transistor and a current mirror circuit to generate a rectifier mirror current signal, a limiter circuit with a limiter transistor and a current mirror circuit to generate a limiter mirror current signal, and a demodulator circuit to demodulate an amplitude shift keying (ASK) RF signal received at the signal input nodes according to the rectifier and limiter mirror current signal to generate a binary demodulator data signal representing the presence or absence of a threshold amount of energy in the RF signal.

First claim

The following is claimed:

1. A transponder circuit, comprising:
a signal input node pair to receive a radio frequency (RF) signal from an associated transponder antenna circuit, the signal input node pair including a first signal input node, and a second signal input node;
a rectifier circuit, including:
a rectifier power transistor connected to one of the first and second signal input nodes to selectively conduct a rectifier current to generate or maintain a supply voltage from the RF signal received at the signal input node pair, and
a rectifier current mirror transistor connected to the rectifier power transistor to form a rectifier current mirror circuit to generate a rectifier mirror current signal proportional to the rectifier current;

a limiter circuit, including:
a limiter power transistor connected to one of the first and second signal input nodes to selectively conduct a limiter current corresponding to the RF signal to limit a voltage of the signal input node pair when the rectifier transistor is not conducting, and
a limiter current mirror transistor connected to the limiter power transistor to form a limiter current mirror circuit to generate a limiter mirror current signal proportional to the limiter current; and

a demodulator circuit to receive the rectifier mirror current signal and the limiter mirror current signal, the demodulator circuit configured to generate a binary demodulator data signal representing the presence or absence of a threshold amount of energy in the RF signal received at the signal input node pair based on the rectifier mirror current signal and the limiter mirror current signal.

2. The transponder circuit of claim 1 , wherein the demodulator circuit includes:
a first comparator circuit to generate a first comparator output signal having a first state when the rectifier mirror current signal is greater than a first threshold current, and a second state when the rectifier mirror current signal is less than or equal to the first threshold current;
a second comparator circuit to generate a second comparator output signal having a first state when the limiter mirror current signal is greater than a second threshold current, and a second state when the limiter mirror current signal is less than or equal to the second threshold current; and
a logic circuit to generate the demodulator data signal in a first state when either of the first and second comparator output signals is in the first state to indicate the presence of the threshold amount of energy in the RF signal, and to generate the demodulator data signal in a second state when the first and second comparator output signals are both in the second state to indicate the absence of the threshold amount of energy in the RF signal.

3. The transponder circuit of claim 2 , further comprising:
a plurality of transponder channel circuits, individually including:
a signal input node pair to receive a radio frequency signal from an associated transponder antenna circuit, the individual signal input node pairs including a first signal input node, and a second signal input node,
a rectifier circuit, including:
a rectifier power transistor connected to one of the first and second signal input nodes to selectively conduct a rectifier current to generate or maintain a supply voltage from the RF signal received at the signal input node pair, and
a rectifier current mirror transistor connected to the rectifier electrical component to form a first current mirror circuit to generate a rectifier mirror current signal proportional to the rectifier current, and

a limiter circuit, including:
a limiter power transistor connected to one of the first and second signal input nodes to selectively conduct a limiter current corresponding to the RF signal to limit a voltage of the signal input node pair when the rectifier transistor is not conducting, and
a limiter current mirror transistor connected to the limiter transistor to form a second current mirror circuit to generate a limiter mirror current signal proportional to the limiter current; and

wherein the demodulator circuit generates the demodulator data signal based on the rectifier mirror current signals and the limiter mirror current signals from the individual transponder channel circuits.

4. The transponder circuit of claim 3 , further comprising a channel select circuit, including:
a summing circuit to sum the rectifier mirror current signal and the limiter mirror current signal to create a field strength signal for each of the individual transponder channel circuits;
a third comparator circuit to compare the field strength signals corresponding to first and second transponder channel circuits, and to generate a third comparator output signal having a first state when the field strength signal corresponding to the first transponder channel circuit is greater than the field strength signal corresponding to the second transponder channel circuit, and a second state when the field strength signal corresponding to the first transponder channel circuit is less than or equal to the field strength signal corresponding to the second transponder channel circuit; and
a logic circuit with an output to generate a channel select signal to select a particular one of the transponder channel circuits for transmitting uplink data.

5. The transponder circuit of claim 4 , further comprising a modulation capacitor circuit, including:
a modulation capacitor, including a first capacitor node, and a second capacitor node; and
a channel switching circuit to selectively connect the capacitor nodes of the modulation capacitor to a selected one of the transponder channel circuits according to the channel select signal.

6. The transponder circuit of claim 3 , further comprising:
a channel select circuit to generate a channel select signal indicating a particular one of the transponder channel circuits having a highest received field strength based on the rectifier mirror current signals and the limiter mirror current signals from the individual transponder channel circuits;
a modulation capacitor, including a first capacitor node, and a second capacitor node; and
a channel switching circuit to selectively connect the first and second capacitor nodes of the modulation capacitor to the particular one of the transponder channel circuits according to the channel select signal.

7. The transponder circuit of claim 1 ,
wherein the rectifier circuit is a full bridge rectifier, including:
a first half bridge rectifier circuit, including:
a first upper transistor connected between a first supply node and the first signal input node,
a diode-connected first lower transistor connected between the first signal input node and a second supply node to selectively conduct a first rectifier current, and
a first rectifier current mirror transistor connected to the first lower transistor to form a first rectifier current mirror circuit to generate a first rectifier mirror current signal proportional to the first rectifier current, and

a second half bridge rectifier circuit, including:
a second upper transistor connected between the first supply node and the second signal input node,
a diode-connected second lower transistor connected between the second signal input node and the second supply node to selectively conduct a second rectifier current, and
a second rectifier current mirror transistor connected to the second lower transistor to form a second rectifier current mirror circuit to generate a second rectifier mirror current signal proportional to the second rectifier current; and

wherein the demodulator circuit is configured to generate the demodulator data signal based on the first and second rectifier mirror current signals and the limiter mirro

Assignees

• Texas Instruments Deutschland

Inventors

• Muellner Ernst Georg

Classifications

• H04B1/40 Primary

  Circuits · CPC title

• H04L27/06 Primary

  Demodulator circuits; Receiver circuits · CPC title

• H02M3/155

  using semiconductor devices only · CPC title

• G06K19/0723

  the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs · CPC title

• G06K7/10297

  arrangements for handling protocols designed for non-contact record carriers such as RFIDs NFCs, e.g. ISO/IEC 14443 and 18092 (cryptographic protocols H04L9/00; network security protocols H04L63/00; real-time communication protocols in data switching networks H04L65/00; network protocols for data switching network services H04L67/00) · CPC title