Sigma-delta analog-to-digital converter with auto tunable loop filter

US9762259B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9762259-B1
Application numberUS-201715401957-A
CountryUS
Kind codeB1
Filing dateJan 9, 2017
Priority dateJan 9, 2017
Publication dateSep 12, 2017
Grant dateSep 12, 2017

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A notch filter in a sigma-delta modulator loop filter increases SNR by limiting in-band quantization noise around a frequency to which the notch filter is precisely tuned. A tuning mode controller isolates the notch filter from other loop filter stages. A bias voltage is applied to the notch filter, causing it to resonate. Tuning mode switches insert the notch filter into a frequency-locked loop (“FLL”) circuit as a variable frequency oscillator component of the FLL. An ADC operational mode input signal is applied to the FLL as a reference signal. A tuning control component of the FLL adjusts a tunable feedback element in the notch filter to drive the FLL error signal to zero in order to precisely tune the notch filter to the center frequency of the ADC input signal. Tuning inputs to the tunable feedback element are then latched prior to re-inserting the notch filter into the modulator.

First claim

Opening claim text (preview).

What is claimed is: 1. A notch filter auto-tuning apparatus associated with a loop filter in a sigma-delta modulator, comprising: a tunable notch filter portion of the modulator loop filter, the tunable notch filter capable of resonating when isolated from other portions of the loop filter; a frequency-locked loop (“FLL”) circuit into which to insert the tunable notch filter as a variable frequency oscillator (“VFO”) component of the FLL during a tuning mode of operation; a set of tuning mode switches coupled to input and output terminals of the tunable notch filter to isolate the notch filter from the other portions of the modulator loop filter and to insert the notch filter into the FLL during the tuning mode of operation; and a bias voltage source coupled to the input terminal of the tunable notch filter to present a bias voltage to the tunable notch filter as an energy source during the tuning mode of operation to cause the tunable notch filter to resonate. 2. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 1 , the tunable notch filter further comprising: a first loop filter integrator stage; a second loop filter integrator stage; and a tunable feedback element coupled between an output terminal of the second loop filter integrator stage and an input terminal of the first loop filter integrator stage, a frequency of resonance of the tunable notch filter determined by a parametric value of the tunable feedback element. 3. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 2 , the tunable feedback element further comprising: a switched resistor network from which to select a series/parallel sub-combination of resistors in order to establish the parametric value of the tunable feedback element as a resistance value. 4. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 2 , the first and second loop filter integrator stages each further comprising: an operational amplifier, a non-inverting input of the operational amplifier coupled to a ground terminal; a feedback capacitor coupled between an output terminal of the operational amplifier and an inverting input terminal of the operational amplifier; and an input resistor coupled between the inverting input and an input to the integrator stage. 5. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 2 , the FLL further comprising: a frequency comparator, a first terminal of the frequency comparator coupled to the output terminal of the second loop filter integrator stage of the tunable notch filter to sense a present frequency at which the tunable notch filter is resonating, a second frequency comparator input terminal coupled to a modulator input terminal to sense a frequency of a reference signal appearing at the modulator input terminal, the frequency comparator to compare the present frequency at which the tunable notch filter is resonating to the frequency of the reference signal and to generate an FLL error signal at an output terminal of the frequency comparator, a magnitude of the FLL error signal proportional to a difference between the present frequency at which the tunable notch filter is resonating and the frequency of the reference signal. 6. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 5 , the FLL further comprising: a tuning control circuit coupled to the output terminal of the frequency comparator and to at least one input terminal associated with the tunable feedback element of the tunable notch filter, the tuning control circuit to present a tuning control signal to the tunable feedback element in order to vary the parametric value of the tunable feedback element in proportion to the magnitude of the FLL error signal and to change the present frequency at which the tunable notch filter is resonating such as to drive the FLL error signal to zero. 7. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 6 , the tuning control signal being a binary word. 8. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 6 , the set of tuning mode switches further comprising: a first tuning mode switch coupled to the input terminal of the first loop filter integrator stage to disconnect a tunable notch filter input from a modulator error amplifier output terminal and to connect the tunable notch filter input to the bias voltage source; and a second tuning mode switch coupled to the output terminal of the second loop filter integrator stage to disconnect a tunable notch filter output from subsequent loop filter integrator stages and to connect the tunable notch filter output to the frequency comparator. 9. The notch filter auto-tuning apparatus associated with the loop filter in the sigma-delta modulator of claim 6 , further comprising: a tuning mode controller coupled to the set of tuning mode switches and to the tuning control circuit, the tuning mode controller to enter the tuning mode of operation in response to a control signal received on a tuning mode controller input terminal, the tuning mode controller to change a state of the set of tuning mode switches and to enable at least one output of the tuning control circuit. 10. A notch filter auto-tuning apparatus associated with a loop filter in a sigma-delta modulator portion of an analog-to-digital converter (“ADC”), comprising: a first loop filter integrator stage including a first operational amplifier, a non-inverting input of the first operational amplifier coupled to a ground terminal, a first feedback capacitor coupled between an output terminal of the first operational amplifier and an inverting input terminal of the first operational amplifier, and a first input resistor coupled between the inverting input of the first operational amplifier and a loop filter input terminal; a second loop filter integrator stage including a second operational amplifier, a non-inverting input of the second operational amplifier coupled to a ground terminal, a second feedback capacitor coupled between an output terminal of the second operational amplifier and an inverting input terminal of the second operational amplifier, and a second input resistor coupled between the inverting input of the second operational amplifier and an input to the second loop filter integrator stage; a digitally tunable feedback element coupled between an output terminal of the second loop filter integrator stage and an inverting input terminal of the first loop filter integrator stage, the first loop filter integrator stage, the second loop filter integrator stage, and the digitally tunable feedback element to form a digitally tunable notch filter to modify a noise transfer function (“NTF”) associated with the sigma-delta modulator to limit in-band quantization noise around a center frequency to which the notch filter is tuned; a frequency-locked loop (“FLL”) circuit into which to insert the tunable notch filter as a variable frequency oscillator (“VFO”) component of the FLL during a tuning mode of operation; a set of tuning mode switches coupled to input and output terminals of the tunable notch filter to isolate the notch filter from the other portions of the modulator loop filter and to insert the notch filter into the FLL during the tuning mode of operation; and a bias voltage source coupled to the input terminal of the tunable notch filter to present a bias voltage to the tunable notch filter as an energy source during the t

Assignees

Inventors

Classifications

  • the quantiser being a multiple bit one · CPC title

  • Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

  • Details of sampling arrangements or methods · CPC title

  • with digital/analogue converter for supplying reference values to converter · CPC title

  • H03M3/436Primary

    characterised by the order of the loop filter, e.g. error feedback type · CPC title

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What does patent US9762259B1 cover?
A notch filter in a sigma-delta modulator loop filter increases SNR by limiting in-band quantization noise around a frequency to which the notch filter is precisely tuned. A tuning mode controller isolates the notch filter from other loop filter stages. A bias voltage is applied to the notch filter, causing it to resonate. Tuning mode switches insert the notch filter into a frequency-locked loo…
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification H03M3/436. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).