Control circuit, control method and flyback converter

Patent metadata

Field	Value
Publication number	US-9762113-B2
Application number	US-201615086420-A
Country	US
Kind code	B2
Filing date	Mar 31, 2016
Priority date	Apr 24, 2015
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

In one embodiment, a control circuit can include: a voltage feedback circuit configured to obtain a voltage feedback signal that represents an output voltage of the power stage circuit; a set signal generator configured to output a set signal when a secondary current crosses zero or a voltage sampling signal reaches a valley value; a reset signal generator configured to output a reset signal in a constant on time mode when the voltage feedback signal is greater than a first voltage threshold value, and to output the reset signal in a peak current mode when the voltage feedback signal is less than the first voltage threshold value; and a logic circuit configured to activate a switching control signal according to the set signal, and to deactivate the switching control signal according to the reset signal.

First claim

What is claimed is:

1. A control circuit configured to control a power stage circuit of a flyback converter, the control circuit comprising:
a) a voltage feedback circuit configured to obtain a voltage feedback signal that represents an output voltage of said power stage circuit;
b) a set signal generator configured to output a set signal when a secondary current crosses zero or a voltage sampling signal reaches a valley value;
c) a reset signal generator configured to output a reset signal in a constant on time mode when said voltage feedback signal is greater than a first voltage threshold value, and to output said reset signal in a peak current mode according to at least two different current threshold values when said voltage feedback signal is less than said first voltage threshold value, wherein at least one of said current threshold values is a piecewise function of said voltage feedback signal; and
d) a logic circuit configured to activate a switching control signal according to said set signal, and to deactivate said switching control signal according to said reset signal, wherein said switching control signal is configured to control a power switch of said power stage circuit.

2. The control circuit of claim 1 , wherein said reset signal generator comprises:
a) a current threshold value generator configured to output a first current threshold value when said voltage feedback signal is less than said first voltage threshold value, and to output a delayed current threshold value when said voltage feedback signal is greater than said first voltage threshold value, wherein said first current threshold value is less than said delayed current threshold value;
b) a comparator configured to compare a primary current sampling signal against a current threshold value, and to output a peak indication signal;
c) a time threshold value generator configured to output a constant on time threshold value when said voltage feedback signal is greater than said first voltage threshold value, and to output a delayed time threshold value when said voltage feedback signal is less than said first voltage threshold value, wherein said constant on time threshold value is less than said delayed time threshold value;
d) a timing circuit configured to generate a timing signal according to a time threshold value for representing that said switching control signal has been active for a time corresponding to said time threshold value; and
e) a reset logic circuit configured to generate said reset signal according to said timing signal and said peak indication signal.

3. The control circuit of claim 1 , wherein said reset signal generator is configured to output said reset signal when said voltage feedback signal is less than said first voltage threshold value and greater than a second voltage threshold value, and to output said reset signal when said voltage feedback signal is less than said second voltage threshold value.

4. The control circuit of claim 3 , wherein said reset signal generator comprises:
a) a current threshold value generator configured to output said first current threshold value when said voltage feedback signal is less than said first voltage threshold value and greater than said second voltage threshold value, to output said second current threshold value when said voltage feedback signal is less than said second voltage threshold value, and to output said delayed current threshold value when said voltage feedback signal is greater than said first voltage threshold value, wherein said delayed current threshold value is greater than said first and second current threshold values;
b) a comparator configured to compare a primary current sampling signal against a current threshold value, and to output a peak indication signal;
c) a time threshold value generator configured to output a constant on time threshold value when said voltage feedback signal is greater than said first voltage threshold value, and to output a delayed time threshold value when said voltage feedback signal is less than said first voltage threshold value, wherein said constant on time threshold value is less than said delayed time threshold value;
d) a timing circuit configured to generate a timing signal according to a time threshold value representing that said switching control signal has been active for a time corresponding to said time threshold value; and
e) a reset logic circuit configured to generate said reset signal according to said timing signal and said peak indication signal.

5. The control circuit of claim 1 , wherein said control circuit is configured to control said power stage circuit in a start-up state of said power stage circuit or when an input voltage of said power stage circuit switches from high to low.

6. A method of controlling a power stage circuit, the method comprising:
a) obtaining a voltage feedback signal representing an output voltage of a power stage circuit;
b) controlling a power switch of said power stage circuit in a constant on time mode when said voltage feedback signal is greater than a first voltage threshold value; and
c) controlling said power switch in a peak current mode according to at least two different current threshold values when said voltage feedback signal is less than said first voltage threshold value, wherein at least one of said current threshold values is a piecewise function of said voltage feedback signal.

7. A method of controlling a power stage circuit, the method comprising:
a) obtaining a voltage feedback signal representing an output voltage of a power stage circuit;
b) controlling a power switch of said power stage circuit in a constant on time mode when said voltage feedback signal is greater than a first voltage threshold value; and
c) controlling said power switch in a peak current mode when said voltage feedback signal is less than said first voltage threshold value, wherein said control method is configured to control said power stage circuit in a start-up state of said power stage circuit or when an input voltage of said power stage circuit switches from high to low.

Assignees

• Silergy Semiconductor Technology Hangzhou Ltd

Inventors

• Chen Huiqiang
• Wang Jianxin

Classifications

• H02M2001/0025

  Electricity · mapped topic

• H02M3/33507

  with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence) · CPC title

• H02M1/36 Primary

  Means for starting or stopping converters · CPC title

• H02M1/08 Primary

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M1/4208

  Arrangements for improving power factor of AC input · CPC title