Ground fault circuit interrupter (GFCI) monitor

Patent metadata

Field	Value
Publication number	US-9762049-B2
Application number	US-201615284141-A
Country	US
Kind code	B2
Filing date	Oct 3, 2016
Priority date	Mar 4, 2011
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

This document discusses, among other things, a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power. Further, the ST GFCI monitor can detect a response to the simulated ground fault.

First claim

What is claimed is:

1. A system, comprising:
a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault, starting in a first half-cycle of a cycle of AC power and extending into a second half-cycle of the cycle of AC power;
a GFCI controller configured to detect a ground fault and to provide an enable signal to a silicon-controlled rectifier (SCR) to interrupt AC power to a load in response to the detected ground fault; and
a diode configured to prevent interruption of AC power during the second half-cycle of the cycle of the cycle of AC power,
wherein the ST GFCI monitor is configured to bias an anode of the SCR during the second half-cycle of the cycle of AC power, and to detect if the anode of the SCR is discharged during the second half-cycle of the cycle of AC power in response to the simulated ground fault.

2. The system of claim 1 , wherein the ST GFCI monitor is configured to generate an end-of-life (EOL) signal if the anode of the SCR is not discharged in response to the simulated ground fault.

3. The system of claim 1 , including:
load contacts;
a solenoid configured to open or close the load contacts, wherein closed load contacts are configured to couple the AC power and the load and open load contacts are configured to decouple the AC power and the load; and
the SCR configured to control the solenoid.

4. The system of claim 3 , including:
wherein the ST GFCI monitor is coupled to the SCR and to the diode,
wherein the diode is coupled to the SCR, to the ST GFCI monitor, and to the solenoid,
wherein the solenoid is coupled to the diode and to the load contacts, and
wherein the SCR is configured to control current through the solenoid.

5. The system of claim 1 , wherein the ST GFCI monitor includes a comparator configured to compare an anode voltage of a silicon-controlled rectifier (SCR) to a threshold voltage during the first half-cycle of the cycle of AC power, the SCR configured to control a solenoid, and
wherein the ST GFCI monitor is configured to detect an open circuit or high impedance condition during the first half-cycle of the cycle of AC power using the comparison of the anode voltage of the SCR to the threshold voltage.

6. The system of claim 5 , wherein the threshold voltage includes a voltage in a range of 60 Volts RMS through 105 Volts RMS.

7. The system of claim 5 , wherein the ST GFCI monitor is configured to generate an end-of-life (EOL) signal if the anode voltage of the SCR is less than the threshold voltage.

8. The system of claim 7 , wherein the ST GFCI monitor is configured to detect a manual self-test and to reset the ST GFCI monitor if a manual self-test is detected.

9. The system of claim 1 , wherein the first half-cycle of the cycle of AC power includes a positive half-cycle of the cycle of AC power, and wherein the second half-cycle of the cycle of AC power includes a negative half-cycle of the cycle of AC power.

10. The system of claim 1 , wherein the first half-cycle of the cycle of AC power includes a negative half-cycle of the cycle of AC power, and wherein the second half-cycle of the cycle of AC power includes a positive half-cycle of the cycle of AC power.

11. The system of claim 1 ,
wherein the GFCI controller is configured to enable the SCR to interrupt AC power to the load in response to the detected ground fault.

12. The system of claim 1 , wherein the ST GFCI monitor is configured to automatically generate the simulated ground fault at a periodic interval.

13. The system of claim 1 , wherein the ST GFCI monitor is configured to automatically generate the simulated ground fault a first period of time following at least one of power-on or reset of the ST GFCI monitor and at a periodic interval following the first simulated fault.

14. The system of claim 1 , including:
a first integrated circuit including the ST GFCI monitor; and
a second integrated circuit including the GFCI controller.

15. The system of claim 1 , wherein the ST GFCI monitor includes a comparator configured to compare an anode voltage of the SCR to a threshold voltage, and
wherein the ST GFCI monitor is configured to detect if the SCR is discharged in response to the simulated ground fault using the comparison of the anode voltage of the SCR to the threshold voltage during the second half-cycle of the cycle of AC power.

16. The system of claim 15 , wherein the ST GFCI monitor is configured to bias the anode of the SCR using a source voltage (VDD) and a switch during the second half-cycle of the cycle of AC power,
wherein the GFCI controller is configured to detect the simulated ground fault as a ground fault, and to provide the enable signal to a gate of the SCR in response to the simulated ground fault
wherein the ST GFCI monitor is configured to detect, using the comparator, if the anode voltage of the SCR is discharged below the threshold voltage in response to the simulated ground fault during the second half-cycle of the cycle of AC power.

17. A method, comprising:
generating a simulated ground fault, using a self-test (ST) ground fault circuit interrupter (GFCI) monitor, starting in a first half-cycle of a cycle of AC power and extending into a second half-cycle of the cycle of AC power; and
detecting a ground fault using a GFCI controller, and providing an enable signal to a silicon-controlled rectifier (SCR) to interrupt AC power to a load in response to the detected ground fault;
preventing interruption of AC power during the second half-cycle of the cycle of AC power using a diode;
biasing an anode of the SCR during the second-half of the cycle of AC power using the ST GFCI monitor; and
detecting, using the ST GFCI monitor, if the anode of the SCR is discharged in response to the simulated ground fault.

18. The method of claim 17 , including:
generating an end-of-life (EOL) signal if the anode of the SCR is not discharged in response to the simulated ground fault.

19. The method of claim 17 , wherein the first half-cycle of the cycle of AC power includes a positive half-cycle of the cycle of AC power, and wherein the second half-cycle of the cycle of AC power includes a negative half-cycle of the cycle of AC power.

20. The method of claim 17 , including:
comparing an anode voltage of the SCR to a threshold voltage during the second half-cycle of the cycle of AC power using a comparator; and
detecting, using the ST GFCI monitor, if the SCR is discharged in response to the simulated ground fault using the comparison of the anode voltage of the SCR to the threshold voltage.

Assignees

• Fairchild Semiconductor

Inventors

• Armstrong Bruce

Classifications

• H02H3/335 Primary

  the main function being self testing of the device · CPC title

• H02H3/334

  with means to produce an artificial imbalance for other protection or monitoring reasons or remote control (H02H3/338 takes precedence) · CPC title

• H02H3/162

  for AC systems · CPC title

• G01R31/3272

  Apparatus, systems or circuits therefor (G01R31/3275 takes precedence) · CPC title