Method and processing apparatus for fabricating a magnetic resistive random access memory device

Patent metadata

Field	Value
Publication number	US-9761795-B2
Application number	US-201615390699-A
Country	US
Kind code	B2
Filing date	Dec 26, 2016
Priority date	Nov 18, 2014
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

Methods of fabricating MRAM devices are provided along with a processing apparatus for fabricating the MRAM devices. The methods may include forming a ferromagnetic layer, cooling the ferromagnetic layer to a temperature within a range of between about 50° K to about 300° K, forming and oxidizing one or more Mg layers on the cooled ferromagnetic layer to form an MgO structure, forming a free layer on the MgO structure, and forming a capping layer on the free layer.

First claim

What is claimed is:

1. A method of fabricating a magnetic resistive random access memory (MRAM) device, the method comprising:
forming a lower electrode on a substrate;
forming a seed layer on the lower electrode;
forming a pinning layer including a CoPt-based layer or CoPd-based layer;
forming a synthetic anti-ferromagnetic (SAF) layer on the pinning layer;
forming a pinned layer including a CoFe-based layer; on the SAF layer;
cooling the substrate having the pinned layer exposed thereon to a range of approximately between about 50° K to about 300° K;
forming a first Mg layer on the pinned layer, after the cooling of the substrate having the pinned layer;
forming a first MgO layer by oxidizing the first Mg layer;
forming a second Mg layer on the first MgO layer;
forming a second MgO layer by oxidizing the second Mg layer, wherein the first and second MgO layers collectively form an MgO structure;
forming a free layer on the MgO structure;
forming a capping layer on the free layer; and
forming an upper electrode on the capping layer.

2. The method of claim 1 ,
wherein the seed layer comprises at least one of Ta or Ru.

3. The method of claim 2 ,
wherein the seed layer comprises a lower Ta layer and an upper Ru layer stacked on the lower Ta layer.

4. The method of claim 1 ,
wherein the pinning layer having a hexagonal closest packing (HCP) structure.

5. The method of claim 1 ,
wherein the pinning layer comprises a stacked layer of Co/Pt or Co/Pd having a face center cubic (FCC) structure or FCC-like structures.

6. The method of claim 1 ,
wherein the SAF layer comprises Ru.

7. The method of claim 1 ,
wherein the pinned layer comprises CoFeB.

8. The method of claim 7 ,
wherein the pinned layer comprises one of multilayer structures including CoFeB/Ta/CoFeB, Co/B/CoFeB, or Co/W/CoFeB/W/CoFeB.

9. The method of claim 1 ,
wherein the free layer comprises a single layer including CoFeB, or a multilayer including CoFeB/W/CoFeB.

10. The method of claim 1 ,
wherein the capping layer comprises a metal including Ta.

11. The method of claim 1 , further comprising:
forming a third Mg layer between the second MgO layer and the free layer; and
forming a third MgO layer by oxidizing the third Mg layer.

12. The method of claim 11 ,
wherein the first MgO layer, the second MgO layer, and the third MgO layer are unified to be materially contiguous with each other.

13. The method of claim 11 , further comprising:
cooling the second MgO layer before forming the third Mg layer thereon.

14. The method of claim 1 , further comprising:
cooling the first MgO layer before forming the second Mg layer thereon.

15. A method of fabricating an MRAM device, the method comprising:
forming a lower electrode on a substrate;
forming a seed layer having Ta and Ru on a lower electrode;
forming a pinning layer including a Co-based layer on the seed layer;
forming an SAF layer on the pinning layer;
forming a pinned layer including an CoFe-based layer on the SAF layer;
cooling the substrate having the pinned layer exposed thereon to a range of approximately between about 50° K to about 300° K;
forming a first Mg layer on the pinned layer, after the cooling of the substrate having the pinned layer;
forming a first MgO layer by oxidizing the first MgO layer;
forming a second Mg layer on the first MgO layer;
forming a second MgO layer by oxidizing the second Mg layer;
forming a free layer having CoFeB on the second MgO layer;
forming a capping layer having Ta on the free layer; and
forming an upper electrode on the capping layer.

Assignees

• Park Yongsung
• Kim Kiwoong
• Kim Sangyong
• Oh Sechung
• Jang Youngman
• Samsung Electronics Co Ltd

Inventors

• Park Yongsung
• Kim Kiwoong
• Kim Sangyong
• Oh Sechung
• Jang Youngman

Classifications

• H01L43/10

  Electricity · mapped topic

• H01L43/02

  Electricity · mapped topic

• H01L27/228

  Electricity · mapped topic

• H01L43/12 Primary

  Electricity · mapped topic

• H01L43/08

  Electricity · mapped topic