III-nitride nanowire LED with strain modified surface active region and method of making thereof

US9761757B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9761757-B2
Application numberUS-201615060950-A
CountryUS
Kind codeB2
Filing dateMar 4, 2016
Priority dateDec 17, 2013
Publication dateSep 12, 2017
Grant dateSep 12, 2017

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Abstract

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A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform surface profile having at least 3 peaks. Each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley, and each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.

First claim

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What is claimed is: 1. A nanowire device, comprising: a semiconductor nanowire core; and a first semiconductor shell located radially around the semiconductor nanowire core, wherein: the first semiconductor shell has a non-uniform surface profile having at least 3 peaks; each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley; each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley including a respective indium poor region; and each of the at least 3 peaks comprises a respective indium rich region having a greater concentration of indium than the indium poor regions of the adjacent valleys. 2. The device of claim 1 , wherein the device comprises a light emitting diode (LED) device and the first semiconductor shell comprises an active region quantum well shell. 3. The device of claim 2 , further comprising a second semiconductor shell located radially outside the first semiconductor shell. 4. A method of making nanowire device, comprising: forming a semiconductor nanowire core; and forming a first semiconductor shell located radially around the semiconductor nanowire core, wherein: the first semiconductor shell has a non-uniform surface profile having at least 3 peaks; each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley; each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley including a respective indium poor region; and each of the at least 3 peaks comprises a respective indium rich region having a greater concentration of indium than the indium poor regions of the adjacent valleys. 5. The method of claim 4 , wherein the device comprises a light emitting diode (LED) device and the first semiconductor shell comprises an active region quantum well shell. 6. The method of claim 5 , further comprising forming a second semiconductor shell radially around the first semiconductor shell. 7. The device of claim 1 , wherein the indium rich regions comprises integral portions of an indium gallium nitride active region quantum shell that laterally surround the semiconductor nanowire core. 8. The device of claim 1 , further comprising an underlayer laterally surrounding the nanowire core having a bumpy surface, wherein strain within the first semiconductor shell is locally modified by bumpiness of the bumpy surface. 9. The device of claim 8 , wherein the underlayer has a lesser indium concentration than the indium poor regions. 10. The device of claim 8 , wherein the first semiconductor shell includes a material selected from InGaN and InAlGaN. 11. The device of claim 10 , wherein the indium rich regions contain 15 to 30 atomic percent indium and the indium poor regions contain less than 10 atomic percent indium. 12. The device of claim 3 , wherein: the semiconductor nanowire core includes an n-doped gallium nitride semiconductor material; and the second semiconductor shell includes a p-doped gallium nitride semiconductor material. 13. The method of claim 4 , wherein the indium rich regions and the indium poor regions are formed by self-assembly during deposition of the first semiconductor shell. 14. The method of claim 4 , wherein the indium rich regions are formed integrally with the indium poor regions in-situ during formation of an active region shell that includes the first semiconductor shell. 15. The method of claim 4 , wherein the indium rich regions comprises integral portions of an indium gallium nitride active region quantum shell that laterally surround the semiconductor nanowire core. 16. The method of claim 4 , further comprising forming an underlayer laterally surrounding the nanowire core having a bumpy surface around the nanowire core, wherein strain within the first semiconductor shell is locally modified by bumpiness of the bumpy surface. 17. The device of claim 16 , wherein the underlayer has a lesser indium concentration than the indium poor regions. 18. The method of claim 4 , wherein the first semiconductor shell includes a material selected from InGaN and InAlGaN. 19. The method of claim 18 , wherein indium rich regions contain 15 to 30 atomic percent indium and the indium poor regions contain less than 10 atomic percent indium. 20. The method of claim 6 , wherein: the semiconductor nanowire core includes an n-doped gallium nitride semiconductor material; and the second semiconductor shell includes a p-doped gallium nitride semiconductor material.

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What does patent US9761757B2 cover?
A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform s…
Who is the assignee on this patent?
Glo Ab
What technology area does this patent fall under?
Primary CPC classification H01L33/06. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).