Semiconductor device and method for manufacturing semiconductor device

US9761736B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9761736-B2
Application numberUS-201414337835-A
CountryUS
Kind codeB2
Filing dateJul 22, 2014
Priority dateJul 25, 2013
Publication dateSep 12, 2017
Grant dateSep 12, 2017

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with each side surface of the first oxide semiconductor film and the second oxide semiconductor film; a first insulating film and a second insulating film over the source electrode and the drain electrode; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode in contact with an upper surface of the gate insulating film and facing an upper surface and the side surface of the second oxide semiconductor film.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first insulating film; a first oxide semiconductor film over the first insulating film; a second oxide semiconductor film over the first oxide semiconductor film; a first conductive film and a second conductive film over the first insulating film; a third oxide semiconductor film over the second oxide semiconductor film, the first conductive film, and the second conductive film; a second insulating film over the third oxide semiconductor film; and a third conductive film over the second insulating film, wherein each of the first conductive film and the second conductive film is in contact with a first side surface of the second oxide semiconductor film, wherein, in a channel width direction, the third conductive film faces a second side surface of the second oxide semiconductor film, wherein the first oxide semiconductor film comprises a depressed portion, and wherein the third oxide semiconductor film is in contact with the depressed portion. 2. The semiconductor device according to claim 1 , wherein, in the channel width direction, the third oxide semiconductor film is in contact with the second side surface of the second oxide semiconductor film. 3. The semiconductor device according to claim 1 , wherein an entire upper surface of the second oxide semiconductor film is in contact with the third oxide semiconductor film. 4. The semiconductor device according to claim 1 , wherein, in a channel length direction, a length of the third oxide semiconductor film is larger than a length of each of the first oxide semiconductor film and the second oxide semiconductor film. 5. The semiconductor device according to claim 1 , wherein the third oxide semiconductor film comprises indium, gallium, and zinc. 6. A semiconductor device comprising: a first conductive film; a first insulating film over the first conductive film; a first oxide semiconductor film over the first insulating film; a second oxide semiconductor film over the first oxide semiconductor film; a second conductive film and a third conductive film over the first insulating film; a third oxide semiconductor film over the second oxide semiconductor film, the first conductive film, and the second conductive film; a second insulating film over the third oxide semiconductor film; and a fourth conductive film over the second insulating film, wherein each of the second conductive film and the third conductive film is in contact with a first side surface of the second oxide semiconductor film, wherein, in a channel width direction, the fourth conductive film faces a second side surface of the second oxide semiconductor film, wherein the first oxide semiconductor film comprises a depressed portion, and wherein the third oxide semiconductor film is in contact with the depressed portion. 7. The semiconductor device according to claim 6 , wherein, in the channel width direction, the third oxide semiconductor film is in contact with the second side surface of the second oxide semiconductor film. 8. The semiconductor device according to claim 6 , wherein an entire upper surface of the second oxide semiconductor film is in contact with the third oxide semiconductor film. 9. The semiconductor device according to claim 6 , wherein, in a channel length direction, a length of the third oxide semiconductor film is larger than a length of each of the first oxide semiconductor film and the second oxide semiconductor film. 10. The semiconductor device according to claim 6 , wherein the fourth conductive film is electrically connected to the first conductive film. 11. The semiconductor device according to claim 6 , wherein the third oxide semiconductor film comprises indium, gallium, and zinc.

Assignees

Inventors

Classifications

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • using masks for semiconductor materials · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US9761736B2 cover?
Provided is a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with each side su…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H01L29/78693. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).