Systems and methods of testing memory devices
US-2024387303-A1 · Nov 21, 2024 · US
US9761663B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9761663-B2 |
| Application number | US-201615221034-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 27, 2016 |
| Priority date | Apr 23, 2014 |
| Publication date | Sep 12, 2017 |
| Grant date | Sep 12, 2017 |
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A semiconductor device that includes a plurality of trench gate structures each having a gate electrode extending in a depth direction of an element, the plurality of trench gate structures including first trench gate structures respectively contributing to control of the element and second trench gate structures respectively not contributing to the control of the element, the semiconductor device including an electrode portion having a potential other than a gate potential, and an electrode pad that is disposed on a front face of a semiconductor substrate, wherein the electrode pad is used as a terminal to apply a predetermined voltage to gate insulator films, in screening that is executed by applying the predetermined voltage to the gate insulator films respectively in contact with the gate electrode connected to the electrode pad and that is executed before the electrode pad is short-circuited to the electrode portion.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device that includes a plurality of trench gate structures each having a gate electrode extending in a depth direction of an element, the plurality of trench gate structures including first trench gate structures respectively contributing to control of the element and second trench gate structures respectively not contributing to the control of the element, the semiconductor device comprising: an electrode portion having a potential other than a gate potential; and an electrode pad that is disposed on a front face of a semiconductor substrate, the electrode pad being connected to the gate electrodes of the second trench gate structures among the plurality of trench gate structures, the electrode pad being short-circuited to the electrode portion, wherein the electrode pad having been configured as a terminal to apply a predetermined voltage to gate insulator films, in screening that is executed by applying the predetermined voltage to the gate insulator films respectively in contact with the gate electrode connected to the electrode pad and that is executed before the electrode pad is short-circuited to the electrode portion. 2. The semiconductor device according to claim 1 , further comprising a plated film that covers the electrode portion and the electrode pad, wherein the electrode pad is short-circuited to the electrode portion through the plated film spreading between the electrode portion and the electrode pad. 3. The semiconductor device according to claim 1 , further comprising: a plated film that is disposed on a surface of the electrode portion and a surface of the electrode pad; and a solder layer that covers the electrode portion and the electrode pad through the plated film, wherein the electrode pad is short-circuited to the electrode portion through the solder layer spreading between the electrode portion and the electrode pad. 4. The semiconductor device according to claim 1 , wherein the electrode pad is disposed to face the electrode portion. 5. The semiconductor device according to claim 1 , further comprising a protective film that protects a front face of the semiconductor substrate in an area surrounding a periphery of an area in which the first and second trench gate structures are disposed, wherein the electrode portion and the electrode pad are disposed on an inner side of an inner termination end of the protective film. 6. The semiconductor device according to claim 1 , wherein the electrode pad is short-circuited to the electrode portion by wire bonding. 7. The semiconductor device according to claim 6 , further comprising a protective film that protects a front face side of the semiconductor substrate in an area surrounding a periphery of an area in which the first and second trench gate structures are disposed, wherein the electrode pad is disposed on an outer side of an inner termination end of the protective film. 8. The semiconductor device according to claim 6 , wherein the electrode pad is short-circuited to the electrode portion disposed in an external circuit. 9. The semiconductor device according to claim 6 , wherein the electrode pad is short-circuited to another electrode pad at a same potential as that of the electrode portion and disposed parallel to the electrode pad. 10. The semiconductor device according to claim 1 , wherein the electrode portion is an emitter electrode electrically connected to a portion of the semiconductor substrate, the portion being along trenches of the first and second trench gate structures.
multiple bond wires connected to a common bond pad · CPC title
between laterally-adjacent chips · CPC title
connecting between multiple bond pads on a chip, e.g. daisy chain · CPC title
Multiple bond pads having different sizes · CPC title
comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title
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