Crystalline tile

Patent metadata

Field	Value
Publication number	US-9761547-B1
Application number	US-201615295357-A
Country	US
Kind code	B1
Filing date	Oct 17, 2016
Priority date	Oct 17, 2016
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

A system and method for vertically integrating heterogeneous devices into a 3D tile architecture are disclosed. The system uses high precision microelectronics fabrication techniques and known-good-die to achieve high yield to integrate devices to process radio frequency signals at microwave frequencies of approximately 300 MHz to 300 GHz and above. The inventive architecture is based on a high density of small diameter vias to manage the integrity of electrical interconnects and simplify electrical routing.

First claim

What is claimed is:

1. A crystalline tile electronics assembly, comprising:
a plurality of crystalline interposers, each interposer comprising a plurality of through-substrate vias (TSVs);
a plurality of crystalline standoffs, each standoff including one or more TSVs, wherein said plurality of crystalline standoffs are interleaved with the plurality of crystalline interposers so as to form a stack with cavities between the interposers;
one or more Monolithic Microwave Integrated Circuit (MMIC) devices in the cavities between the interposers created by the standoffs; and
one or more transmission lines on a surface of a first interposer, said one or more transmission lines interconnecting at least one MIMIC device to a vertical interconnection formed by the one or more TSVs in one of the a standoffs, and wherein said TSVs in the first interposer form a via fence to provide isolation for the one or more transmission lines.

2. The assembly of claim 1 , further comprising one or more filters on a surface of one of the interposers.

3. The assembly of claim 1 , wherein TSVs in the interposer are arranged to form a via fence for the one or more filters.

4. The assembly of claim 1 , wherein the MMIC devices are known-good-die (KGD).

5. The assembly of claim 1 , further comprising an antenna element fabricated on an outer surface of the top crystalline interposer of the stack of crystalline standoffs and crystalline interposers of the crystalline tile electronics assembly.

6. The assembly of claim 1 , wherein the crystalline interposers further comprise one Or more metal interconnect layers on one or more surfaces of the crystalline interposers, said metal interconnect layers forming electrical connections between devices in the assembly.

7. The assembly of claim 1 , further comprising circuitry fabricated on the surface of at least one crystalline interposer, said circuitry including active and passive circuits.

8. The assembly of claim 1 , wherein the crystalline standoffs further comprise glass, quartz, SIC or alumina crystalline standoffs.

9. The assembly of claim 1 , wherein the crystalline interposers further comprise glass, quartz, silicon carbide (SiC) or alumina crystalline interposers.

10. The assembly of claim 6 , wherein said circuitry comprises stripline metal routing lines, RF transmission lines, Wilkinson splitters, RF filters, couplers, baluns or antennas.

Assignees

• Northrop Grumman Systems Corp

Inventors

• Kunkee Elizabeth T
• Jackson Charles M
• Duan Dah-Weih

Classifications

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W70/698

  Semiconductor materials that are electrically insulating, e.g. undoped silicon · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W44/251

  for monolithic microwave integrated circuits [MMIC] · CPC title