Isolator and method of manufacturing isolator

US9761545B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9761545-B2
Application numberUS-201615201369-A
CountryUS
Kind codeB2
Filing dateJul 1, 2016
Priority dateJul 3, 2015
Publication dateSep 12, 2017
Grant dateSep 12, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An isolator is configured by a transmission circuit, a transformer, and a reception circuit. A first coil of the transformer is disposed on a back surface of a first semiconductor substrate; a transmission circuit and a second coil of the transformer are disposed on a front surface. The first coil is embedded within a coil trench, is led out through an embedded via-metal-film to a substrate front surface, and is electrically connected to the transmission circuit. The second coil is disposed on an insulating layer of the substrate front surface. The reception circuit is disposed on a front surface of a second semiconductor substrate. The second coil and the reception circuit are electrically connected to each other by connecting first and third electrode pads disposed respectively on the front surfaces of the first and second semiconductor substrates through wires.

First claim

Opening claim text (preview).

What is claimed is: 1. An isolator, comprising: a first semiconductor substrate and a second semiconductor substrate; a first coil disposed on a first principal surface side of the first semiconductor substrate, the first coil being configured by: a trench disposed in the first principal surface of the first semiconductor substrate, an oxide film disposed along a side wall and a bottom surface of the trench, and a first metal film embedded inside the oxide film within the trench; a first circuit disposed on a second principal surface side of the first semiconductor substrate; a second coil disposed on the second principal surface side of the first semiconductor substrate and opposing the first coil across the first semiconductor substrate; a second circuit disposed on a second principal surface side of the second semiconductor substrate; and a transformer configured by the first coil and the second coil, and transferring a signal between the first circuit and the second circuit from the first circuit to the second circuit or from the second circuit to the first circuit in an electrically isolated state. 2. The isolator of claim 1 , further comprising a via hole reaching the trench from the second principal surface of the first semiconductor substrate, wherein the oxide film is disposed along a side wall of the via hole, and the first metal film is embedded inside the oxide film within the via hole, and a signal from the first circuit or the second circuit is input to the first coil, through the first metal film within the via hole. 3. The isolator of claim 1 , wherein the first metal film is a plated film. 4. The isolator of claim 1 , further comprising an insulating layer disposed on the second principal surface of the first semiconductor substrate to cover the first circuit, wherein the second coil is configured by a second metal film disposed on the insulating layer. 5. The isolator of claim 4 , wherein the second metal film is a plated film. 6. An isolator, comprising: a first semiconductor substrate and a second semiconductor substrate; a first coil disposed on a first principal surface side of the first semiconductor substrate; a first circuit disposed on a second principal surface side of the first semiconductor substrate; a second coil disposed on the second principal surface side of the first semiconductor substrate and opposing the first coil across the first semiconductor substrate; a second circuit disposed on a second principal surface side of the second semiconductor substrate; and a transformer configured by the first coil and the second coil, and transferring a signal between the first circuit and the second circuit from the first circuit to the second circuit or from the second circuit to the first circuit in an electrically isolated state, wherein the first circuit opposes the first coil and the second coil in a depth direction, the first coil and the second coil have a planar spiral shape, and the first circuit includes a circuit unit prone to malfunctioning consequent to at least magnetic flux of one of the first coil and the second coil opposes in the depth direction, the first coil and the second coil in a portion other than centers of spirals of the first coil and the second coil. 7. The isolator of claim 6 , wherein in the first circuit, the circuit unit prone to malfunctioning consequent to at least magnetic flux of the one coil opposes the first coil and the second coil in the depth direction, at a position outward from innermost circumferences of the spirals of the first coil and the second coil. 8. The isolator of claim 7 , wherein in the first circuit, the circuit unit prone to malfunctioning consequent to at least magnetic flux of the one coil opposes in the depth direction, a portion outward from the innermost circumferences and inward from outermost circumferences of the spirals of the first coil and the second coil. 9. An isolator, comprising: a first semiconductor substrate and a second semiconductor substrate; a first coil disposed on a first principal surface side of the first semiconductor substrate; a first circuit disposed on a second principal surface side of the first semiconductor substrate; a second coil disposed on the second principal surface side of the first semiconductor substrate and opposing the first coil across the first semiconductor substrate; a second circuit disposed on a second principal surface side of the second semiconductor substrate; a transformer configured by the first coil and the second coil, and transferring a signal between the first circuit and the second circuit from the first circuit to the second circuit or from the second circuit to the first circuit in an electrically isolated state; and a single mounting substrate on which are mounted the first semiconductor substrate and the second semiconductor substrate. 10. An isolator, comprising: a first semiconductor substrate and a second semiconductor substrate; a first coil disposed on a first principal surface side of the first semiconductor substrate; a first circuit disposed on a second principal surface side of the first semiconductor substrate; a second coil disposed on the second principal surface side of the first semiconductor substrate and opposing the first coil across the first semiconductor substrate; a second circuit disposed on a second principal surface side of the second semiconductor substrate; a transformer configured by the first coil and the second coil, and transferring a signal between the first circuit and the second circuit from the first circuit to the second circuit or from the second circuit to the first circuit in an electrically isolated state, wherein the second circuit has an electrode portion on the second principal surface side of the first semiconductor substrate connected by a wire to one of the first coil and the second coil. 11. The isolator of claim 10 , wherein the first circuit is a transmission circuit, the second circuit is a reception circuit, and a signal from the first circuit is input to the first coil and input from the second coil through the wire to the second circuit. 12. The isolator of claim 10 , wherein the first circuit is a reception circuit, the second circuit is a transmission circuit, and a signal from the second circuit is input to the second coil through the wire and input from the second coil to the first circuit. 13. An isolator comprising: a first semiconductor substrate; and a second semiconductor substrate that is free of direct contact with the first semiconductor substrate; a first coil disposed on a first principal surface side of the first semiconductor substrate; a first circuit disposed on a second principal surface side of the first semiconductor substrate; a second coil disposed on the second principal surface side of the first semiconductor substrate and opposing the first coil across the first semiconductor substrate; a second circuit disposed on a second principal surface side of the second semiconductor substrate; and a transformer configured by the first coil and the second coil, and transferring a signal between the first circuit and the second circuit from the first circuit to the second circuit or from the second circuit to the first circuit in an electrically isolated state. 14. A method of manufacturing an isolator including a first coil disposed on a first principal surface side of a first semiconductor substrate, a first circuit disposed on a second principal surface side of the first semiconductor substrate, a second coil disposed on the second principal surface side o

Assignees

Inventors

Classifications

  • between laterally-adjacent chips · CPC title

  • between stacked chips · CPC title

  • characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

  • of isolation regions comprising dielectric materials · CPC title

  • Isolation regions comprising dielectric materials · CPC title

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Frequently asked questions

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What does patent US9761545B2 cover?
An isolator is configured by a transmission circuit, a transformer, and a reception circuit. A first coil of the transformer is disposed on a back surface of a first semiconductor substrate; a transmission circuit and a second coil of the transformer are disposed on a front surface. The first coil is embedded within a coil trench, is led out through an embedded via-metal-film to a substrate fro…
Who is the assignee on this patent?
Fuji Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W44/501. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).