Current starved voltage comparator and selector

Patent metadata

Field	Value
Publication number	US-9761284-B1
Application number	US-201615199578-A
Country	US
Kind code	B1
Filing date	Jun 30, 2016
Priority date	Jun 30, 2016
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

An apparatus is provided which comprises: a bi-directional switch; and a comparator coupled to the bi-directional switch, the comparator having: a first input coupled to a first terminal of the bi-directional switch; a second input coupled to a second terminal of the bi-directional switch; and an output coupled to a body or substrate of the bi-directional switch.

First claim

We claim:

1. An apparatus comprising:
a body or substrate of a p-type transistor, the p-type transistor having a source terminal and a drain terminal which are to receive a source voltage and a drain voltage, respectively; and
a sensor coupled to the source and drain terminals of the p-type transistor, wherein the sensor is to determine whether the source voltage and the drain voltage are different, and to provide a body voltage to the body or substrate of the p-type transistor according to a larger of the source or drain voltages.

2. The apparatus of claim 1 , wherein the sensor has a bandwidth which is proportional to a difference between the source and drain voltages.

3. The apparatus of claim 1 , wherein the sensor comprises:
a first switch coupled to the source terminal of the p-type transistor; and
a second switch coupled in series with the first switch via a common node, wherein the second switch is coupled to the drain terminal of the p-type transistor, wherein the common node is coupled to the body or substrate of the p-type transistor.

4. The apparatus of claim 3 , wherein the sensor comprises a first device coupled to the common node and a gate terminal of the second switch, and wherein the first device has a gate terminal coupled to a gate terminal of the first switch.

5. The apparatus of claim 4 , wherein the sensor comprises a second device coupled to the common node and a gate terminal of the first switch, and wherein the second device has a gate terminal coupled to a gate terminal of the second switch.

6. The apparatus of claim 3 , wherein the sensor comprises a first operational transconductance amplifier (OTA) coupled to the source terminal of the p-type transistor.

7. The apparatus of claim 6 , wherein the sensor comprises a second OTA coupled to the drain terminal of the drain terminal of the p-type transistor.

8. The apparatus of claim 1 , wherein the p-type transistor is a bi-directional switch.

9. An apparatus comprising:
a bi-directional switch; and
a comparator coupled to the bi-directional switch, the comparator having:
a first input coupled to a first terminal of the bi-directional switch;
a second input coupled to a second terminal of the bi-directional switch; and
an output coupled to a body or substrate of the bi-directional switch.

10. The apparatus of claim 9 , wherein the comparator has a bandwidth which is proportional to a difference between a voltage on the first input and a voltage on the second input.

11. The apparatus of claim 9 , wherein the bi-directional switch is a p-type transistor.

12. The apparatus of claim 9 , wherein the comparator is to determine whether a first voltage on the first input and a second voltage on the second input are different, and to provide a body voltage to the body or substrate of the bi-directional switch according to a larger of the first or second voltages.

13. The apparatus of claim 9 , wherein the comparator comprises:
a first switch coupled to the first terminal of the bi-directional switch; and
a second switch coupled in series with the first switch via a common node, wherein the second switch is coupled to the second terminal of the bi-directional switch, wherein the common node is coupled to the body or substrate of the bi-directional switch.

14. The apparatus of claim 13 , wherein the comparator comprises a first device coupled to the common node and a gate terminal of the second switch, and wherein the first device has a gate terminal coupled to a gate terminal of the first switch.

15. The apparatus of claim 14 , wherein the comparator comprises a second device coupled to the common node and a gate terminal of the first switch, and wherein the second device has a gate terminal coupled to a gate terminal of the second switch.

16. The apparatus of claim 15 , wherein the comparator comprises a first operational transconductance amplifier (OTA) coupled to the source terminal of the p-type transistor.

17. The apparatus of claim 16 , wherein the comparator comprises a second OTA coupled to the drain terminal of the drain terminal of the p-type transistor.

18. A system comprising:
a memory;
a processor coupled to the memory, the processor comprising:
a bi-directional switch; and
a comparator coupled to the bi-directional switch, the comparator having:
a first input coupled to a first terminal of the bi-directional switch;
a second input coupled to a second terminal of the bi-directional switch; and
an output coupled to a body or substrate of the bi-directional switch, wherein the comparator has a bandwidth which is proportional to a difference between a voltage on the first input and a voltage on the second input; and

a wireless interface for allowing the processor to communicate with another device.

19. The system of claim 17 , wherein the comparator is to determine whether a first voltage on the first input and a second voltage on the second input are different, and to provide a body voltage to the body or substrate of the bi-directional switch according to a larger of the first or second voltages.

20. The system of claim 17 , wherein the comparator comprises:
a first switch coupled to the first terminal of the bi-directional switch; and
a second switch coupled in series with the first switch via a common node, wherein the second switch is coupled to the second terminal of the -directional switch, and wherein the common node is coupled to the body or substrate of the -directional switch.

21. The system of claim 20 , wherein the comparator comprises:
a first device coupled to the common node and a gate terminal of the second switch, and wherein the first device has a gate terminal coupled to a gate terminal of the first switch; and
a second device coupled to the common node and a gate terminal of the first switch, and wherein the second device has a gate terminal coupled to a gate terminal of the second switch.

22. The system of claim 21 , wherein the comparator comprises:
a first operational transconductance amplifier (OTA) coupled to the source terminal of the p-type transistor; and
a second OTA coupled to the drain terminal of the drain terminal of the p-type transistor.

Assignees

• Intel Corp

Inventors

• Hulub Marian
• Heymann Roland

Classifications

• H03K17/687

  the devices being field-effect transistors · CPC title

• H03F2200/36

  the amplifier comprising means for increasing the bandwidth · CPC title

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title

• H03K2217/0018

  Special modifications or use of the back gate voltage of a FET · CPC title

• H03F2203/45288

  Differential amplifier with circuit arrangements to enhance the transconductance · CPC title