PCIe network system with fail-over capability and operation method thereof

Patent metadata

Field	Value
Publication number	US-9760455-B2
Application number	US-201514983580-A
Country	US
Kind code	B2
Filing date	Dec 30, 2015
Priority date	Nov 25, 2015
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

A Peripheral Component Interconnect Express (PCIe) network system with fail-over capability and an operation method thereof are provided. The PCIe network system includes a management host, a PCIe switch, a first non-transparent bridge, and a second non-transparent bridge. The upstream port of the PCIe switch is electrically coupled to the management host. The first non-transparent bridge is disposed in the PCIe switch for electrically coupling to the first PCIe port of a calculation host. The first non-transparent bridge can couple the first PCIe port of the calculation host to the management host. The second non-transparent bridge is disposed in the PCIe switch for electrically coupling to the second PCIe port of the calculation host. The second non-transparent bridge can couple the second PCIe port of the calculation host to the management host.

First claim

What is claimed is:

1. A peripheral component interconnect express (PCIe) network system, comprising:
a first management host;
a PCIe switch, wherein a first upstream port of the PCIe switch is electrically coupled to the first management host;
a first non-transparent bridge, disposed in the PCIe switch, electrically coupling to a first PCIe port of a first calculation host, wherein the first non-transparent bridge couples the first PCIe port of the first calculation host to the first management host; and
a second non-transparent bridge, disposed in the PCIe switch, electrically coupling to a second PCIe port of the first calculation host, wherein the second non-transparent bridge couples the second PCIe port of the first calculation host to the first management host.

2. The PCIe network system according to claim 1 , wherein a first extended memory address of the first management host is mapped to a local memory address of the first calculation host through the first non-transparent bridge of the PCIe switch, and a second extended memory address of the first management host is mapped to the local memory address of the first calculation host through the second non-transparent bridge of the PCIe switch.

3. The PCIe network system according to claim 1 , wherein a first extended memory address of the first calculation host is mapped to a local memory address of the first management host through the first non-transparent bridge of the PCIe switch, and a second extended memory address of the first calculation host is mapped to the local memory address of the first management host through the second non-transparent bridge of the PCIe switch.

4. The PCIe network system according to claim 1 , wherein a global memory address space of the first management host is defined as a plurality of address ranges, wherein a first address range of the address ranges is allocated to serve as local memory address of the first management host, the first management host accesses resources of local memory address of the first calculation host through the first non-transparent bridge of the PCIe switch by using a second address range of the address ranges, and the first management host accesses the resources of the local memory address of the first calculation host through the second non-transparent bridge of the PCIe switch by using a third address range of the address ranges.

5. The PCIe network system according to claim 1 , wherein a global memory address space of the first calculation host is defined as a plurality of address ranges, wherein a first address range of the address ranges is allocated to serve as local memory address of the first calculation host, the first calculation host accesses resources of local memory address of the first management host through the first non-transparent bridge of the PCIe switch by using a second address range of the address ranges, and the first calculation host accesses the resources of the local memory address of the first management host through the second non-transparent bridge of the PCIe switch by using a third address range of the address ranges.

6. The PCIe network system according to claim 1 , further comprising:
a third non-transparent bridge, disposed in the PCIe switch, electrically coupling to a first PCIe port of a second calculation host, wherein the third non-transparent bridge couples the first PCIe port of the second calculation host to the first management host; and
a fourth non-transparent bridge, disposed in the PCIe switch, electrically coupling to a second PCIe port of the second calculation host, wherein the fourth non-transparent bridge couples the second PCIe port of the second calculation host to the first management host.

7. The PCIe network system according to claim 6 , wherein a first extended memory address of the first calculation host is mapped to a second extended memory address of the first management host through the first non-transparent bridge of the PCIe switch, the second extended memory address of the first management host is mapped to a local memory address of the second calculation host through the third non-transparent bridge of the PCIe switch, a third extended memory address of the first calculation host is mapped to a fourth extended memory address of the first management host through the second non-transparent bridge of the PCIe switch, and the fourth extended memory address of the first management host is mapped to the local memory address of the second calculation host through the fourth non-transparent bridge of the PCIe switch.

8. The PCIe network system according to claim 6 , wherein a global memory address space of the first calculation host is defined as a plurality of address ranges, wherein a first address range of the address ranges is allocated to serve as local memory address of the first calculation host, the first calculation host accesses resources of local memory address of the second calculation host through the first non-transparent bridge of the PCIe switch and the first management host by using a second address range of the address ranges, and the first calculation host accesses the resources of the local memory address of the second calculation host through the second non-transparent bridge of the PCIe switch and the first management host by using a third address range of the address ranges.

9. The PCIe network system according to claim 1 , further comprising:
a second management host electrically coupled to a second upstream port of the PCIe switch, wherein when the second management host detects a failure of the first management host, the second management host performs a fail-over procedure to manage the PCIe switch in place of the first management host.

10. The PCIe network system according to claim 9 , wherein the PCIe switch is divided into a plurality of virtual switches, wherein a first virtual switch of the virtual switches comprises the first upstream port and a second virtual switch of the virtual switches comprises the second upstream port, wherein when the first management host manages the PCIe switch, all downstream ports of the PCIe switch are allocated to the first virtual switch and the second virtual switch comprises the second upstream port.

11. The PCIe network system according to claim 10 , wherein the fail-over procedure comprises:
controlling the PCIe switch by the second management host, all the downstream ports of the first virtual switch are changed to be allocated to the second virtual switch and the first virtual switch comprises the first upstream port;
self-rebooting the second management host by using a running kernel image of the second management host;
self-rebooting the first management host by using a controller kernel image of the first management host, and copying a template kernel image of the first management host as a running kernel image of the first management host; and
self-rebooting the first management host by using the controller kernel image of the first management host and monitoring a condition of the second management host.

12. An operation method of a PCIe network system, the operation method comprising:
disposing a first management host;
disposing a PCIe switch, wherein a first upstream port of the PCIe switch is electrically coupled to the first management host;
disposing a first non-transparent bridge in the PCIe switch for electrically coupling to a first PCIe port of a first calculation host;
disposing a second non-transparent bridge in the PCIe switch for electrically coupling to a second PCIe port of the first calculation host;
coupling the first PCIe port of the first calculation host to the first management host by the first non-tran

Assignees

• Ind Tech Res Inst

Inventors

• Lee Chao-Tang
• Tu Cheng-Chun
• Chiueh Tzi-Cker

Classifications

• G06F11/2097

  maintaining the standby controller/processing unit updated (initialisation or re-synchronisation thereof G06F11/1658 and subgroups) · CPC title

• G06F11/1423

  by reconfiguration of paths · CPC title

• G06F11/2043

  where the redundant components share a common memory address space · CPC title

• G06F11/2007 Primary

  using redundant communication media · CPC title

• G06F11/2017

  where memory access, memory control or I/O control functionality is redundant (redundant communication control functionality G06F11/2005; redundant storage control functionality G06F11/2089) · CPC title