Current output circuit

Patent metadata

Field	Value
Publication number	US-9760232-B2
Application number	US-201514946655-A
Country	US
Kind code	B2
Filing date	Nov 19, 2015
Priority date	Feb 10, 2015
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

Provided is a current output circuit 1 including a pseudo sine wave separation circuit 11 that separates a pseudo sine wave represented by a digital code Din into two pseudo half-waves represented by digital signals D 1 and D 2 , a DA converter 113 that converts the pseudo half-wave represented by the digital signal D 1 into an analog half-wave signal V 1 , a DA converter 114 that converts the pseudo half-wave represented by the digital signal D 2 into an analog half-wave signal V 2 , and a voltage-current conversion circuit 12 that converts voltages of the half-wave signals V 1 and V 2 into currents and outputs a current Iout obtained by combining the currents.

First claim

What is claimed is:

1. A current output circuit comprising:
a separation circuit that separates a digital pseudo sine wave into first and second digital pseudo half-waves;
a first DA converter that converts the first digital pseudo half-wave into a first analog half-wave signal;
a second DA converter that converts the second digital pseudo half-wave into a second analog half-wave signal; and
a voltage-circuit conversion circuit that converts voltages of the first and second half-wave signals into currents and outputs a current obtained by combining the currents, wherein
the pseudo sine wave is represented by a digital code having an n (n is a natural number) bit width, and
the separation circuit comprises:
a plurality of OR circuits that output a logical OR between a value of a most significant bit representing a code in the digital code and values of bits other than the most significant bit as the first pseudo half-wave; and
a plurality of AND circuits that output a logical AND between the value of the most significant bit in the digital code and the values of the hits other than the most significant bit as the second pseudo half-wave.

2. The current output circuit according to claim 1 , wherein
a first reference voltage that determines a reference value of an output is supplied to a high-potential power supply terminal of the first DA converter, and a first bias voltage that determines an amplitude of the output is supplied to a low-potential power supply terminal of the first DA converter,
a second reference voltage that determines a reference value of an output is supplied to a low-potential power supply terminal of the second DA converter, and a second bias voltage that determines an amplitude of the output is supplied to a high-potential power supply terminal of the second DA converter, and
a potential difference between the first reference voltage and the first bias voltage is substantially the same as a potential difference between the second reference voltage and the second bias voltage.

3. The current output circuit according to claim 1 , wherein
the first reference voltage that determines the reference value of the output is supplied to the high-potential power supply terminal of the first DA converter, and the first bias voltage that determines the amplitude of the output is supplied to the low-potential power supply terminal of the first DA converter,
the second reference voltage that determines the reference value of the output is supplied to the low-potential power supply terminal of the second DA converter and the second bias voltage that determines the amplitude of the output is supplied to the high-potential power supply terminal of the second DA converter, and
the first reference voltage is a power supply voltage, and the second reference voltage is a ground voltage.

4. The current output circuit according to claim 3 further comprising a variable resistive element that is disposed between the low-potential power supply terminal of the first DA converter and the high-potential power supply terminal of the second DA converter, wherein
the first and second DA converters are resistive string or R 2 R resistor ladder DA converters.

5. The current output circuit according to claim 3 , further comprising:
a first variable resistive element that is disposed between the low-potential power supply terminal of the first DA converter and a power supply that generates the first bias voltage; and
a second variable resistive element that is disposed between the high-potential power supply terminal of the second DA converter and a power supply that generates the second bias voltage, wherein
the first and second DA converters are resistive string or R 2 R resistor ladder DA converters.

6. The current output circuit according to claim 3 , further comprising:
a first resistive element that is disposed between the high-potential power supply terminal of the first DA converter and a power supply that generates the first reference voltage; and
a second resistive element that is disposed between the low-potential power supply terminal of the second DA converter and a power supply that generates the second reference voltage, wherein
the first and second DA converters are resistive string or R 2 R resistor ladder DA converters.

7. The current output circuit according to claim 4 , further comprising:
a first resistive element that is disposed between the high-potential power supply terminal of the first DA converter and a power supply that generates the first reference voltage; and
a second resistive element that is disposed between the low-potential power supply terminal of the second DA converter and a power supply that generates the second reference voltage, wherein
the first and second DA converters are resistive string or R 2 R resistor ladder DA converters.

8. A current output circuit comprising:
a separation circuit that separates a digital pseudo sine wave into first and second digital pseudo half-waves;
a first DA converter that converts the first digital pseudo half-wave into a first analog half-wave signal;
a second DA converter that converts the second digital pseudo half-wave into a second analog half-wave signal; and
a voltage-current conversion circuit that converts voltages of the first and second half-wave signals into currents and outputs a current obtained by combining the currents, wherein
the voltage-current conversion circuit comprises:
a third resistive element that is disposed between a high-potential power supply terminal and an output terminal, the high-potential power supply terminal being supplied with the power supply voltage;
a first driver transistor that is disposed between the third resistive element and the output terminal;
a first amplifier that amplifies a potential difference between a source voltage of the first driver transistor and a voltage of the first half-wave signal and supplies the amplified potential difference to a gate of the first driver transistor;
a fourth resistive element that is disposed between a low-potential power supply terminal and the output terminal, the low-potential power supply terminal being supplied with the ground voltage;
a second driver transistor that is disposed between the fourth resistive element and the output terminal; and
a second amplifier that amplifies a potential difference between a source voltage of the second driver transistor and a voltage of the second half-wave signal and supplies the amplified potential difference to a gate of the second driver transistor.

Assignees

• Renesas Electronics Corp

Inventors

• Fuwa Kosuke

Classifications

• H03M1/765

  using a single level of switches which are controlled by unary decoded digital signals · CPC title

• H03M1/68

  with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits · CPC title

• G06F3/046

  by electromagnetic means · CPC title

• G06F3/045 Primary

  using resistive elements, e.g. a single continuous surface or two parallel surfaces put in contact · CPC title

• H03M1/745

  with weighted currents · CPC title