Backward compatibility through use of spoof clock and fine grain frequency control

US9760113B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9760113-B2
Application numberUS-201514627988-A
CountryUS
Kind codeB2
Filing dateFeb 20, 2015
Priority dateFeb 20, 2015
Publication dateSep 12, 2017
Grant dateSep 12, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An application runs at a first operating frequency if the application is designed for a current version of a system and runs at a second operating frequency if the application is designed for a prior version of the system that operates at a lower frequency than the first operating frequency. The second operating frequency may be higher than the operating frequency of the prior version of the system to account for differences in latency, throughput or other processing characteristics between the two systems. Software readable cycle counters are based on a spoof clock running at the operating frequency of the prior version of the system, rather than the true operating frequency. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

First claim

Opening claim text (preview).

What is claimed is: 1. A method, comprising: a) determining whether an application loaded on a current version of a system is for the current version of a system or a less powerful version of the system, wherein the current version of the system is characterized by a standard clock frequency; b) running the application on a processor at the standard clock frequency of the current version of the system when the application is designed for a current version of a system; or c) running the application at a second clock frequency when the application is designed for a less powerful version of the system, wherein the less powerful version of the system is characterized by a different standard clock frequency, wherein the second clock frequency is less than the standard clock frequency of the current version of the system and higher than the standard clock frequency of the less powerful version of the system. 2. The method of claim 1 , wherein a) includes examining a software ID of the application, a software checksum of the application, metadata associated with the application, or a media type associated with the application. 3. The method of claim 1 , wherein c) includes setting the second frequency based on the difference in latency or latency characteristics between the current and less powerful versions of the system, differences in throughput or speed of operation between the current and less powerful versions of the system, or differences between the current and less powerful versions of the system with regards to algorithms employed in computations. 4. The method of claim 1 , wherein the current version of the system includes a software readable cycle counter, which increments at the standard clock frequency of the less powerful version of the system or a rate so close to it as to avoid triggering errors in operation. 5. The method of claim 1 , wherein the current version of the system includes a software readable cycle counter, wherein c) includes incrementing the cycle counter at the standard clock frequency of the less powerful system or a rate so close to it as to avoid triggering errors in operation, and b) includes incrementing the cycle counter at a different rate. 6. The method of claim 1 , wherein the processor in b) includes a clock set to run at the standard clock frequency of the current version of the system, wherein running the application in c) includes setting a second clock to run the processor at the second clock frequency and setting the second clock frequency to different values for different applications. 7. The method of claim 1 , wherein c) includes dynamically setting the second clock frequency based on the performance characteristics of the application currently running on the processor. 8. The method of claim 1 , wherein c) further includes determining the second clock frequency by taking into account differences in latency or latency characteristics between the current version and the less powerful version of the system. 9. The method of claim 1 , wherein c) further includes determining the second clock frequency by taking into account differences in throughput between the current version and the less powerful version of the system. 10. The method of claim 1 , wherein c) further includes determining the second clock frequency by taking into account differences between the current version and the less powerful version of the system with regards to algorithms used in computations. 11. A system, comprising: a processor; a memory; and processor executable instructions embodied in the memory, the instructions being configured to implement a method upon execution by the processor, the method comprising: a) determining whether an application loaded on a current version of the system is for the current version of the system or a less powerful version of the system, wherein the current version of the system is characterized by a standard clock frequency; b) running the application on a processor at the standard clock frequency of the current version of the system when the application is designed for a current version of a system; or c) running the application at a second clock frequency when the application is designed for a less powerful version of the system, wherein the less powerful version of the system is characterized by a different standard clock frequency, wherein the second clock frequency is less than the standard clock frequency of the current version of the system and higher than the standard clock frequency of the less powerful version of the system. 12. The system of claim 11 , wherein a) includes examining a software ID of the application, a software checksum of the application, metadata associated with the application, or a media type associated with the application. 13. The system of claim 11 , wherein c) includes setting the second frequency based on the difference in latency or latency characteristics between the current and less powerful versions of the system, differences in throughput or speed of operation between the current and less powerful versions of the system, or differences between the current and less powerful versions of the system with regards to algorithms employed in computations. 14. The system of claim 11 , wherein the current version of the system includes a software readable cycle counter, which increments at the standard clock frequency of the less powerful version of the system or a rate so close to it as to avoid triggering errors in operation. 15. The system of claim 11 , wherein the current version of the system includes a software readable cycle counter, wherein c) includes incrementing the cycle counter at the standard clock frequency of the less powerful system or a rate so close to it as to avoid triggering errors in operation, and b) includes incrementing the cycle counter at a different rate. 16. The system of claim 11 , wherein c) includes setting the second clock frequency to different values for different applications. 17. The system of claim 11 , wherein c) includes dynamically setting the second clock frequency based on the performance characteristics of the application currently running on the processor. 18. The system of claim 11 , wherein c) further includes determining the second clock frequency by taking into account differences in latency or latency characteristics between the current version and the less powerful version of the system. 19. The system of claim 11 , wherein c) further includes determining the second clock frequency by taking into account differences in throughput between the current version and the less powerful version of the system. 20. The system of claim 11 , wherein c) further includes determining the second clock frequency by taking into account differences between the current version and the less powerful version of the system with regards to algorithms used in computations. 21. A non-transitory computer readable medium having computer readable instructions embodied therein, the instructions being configured to implement a method upon execution by a processor, the method comprising: a) determining whether an application loaded on a current version of a system is for the current version of a system or a less powerful version of the system, wherein the current version of the system is characterized by a standard clock frequency; b) running the application on a processor at the standard clock frequency of the current version of the system when the application is designed for a current version of a syste

Assignees

Inventors

Classifications

  • Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines · CPC title

  • G06F1/08Primary

    Clock generators with changeable or programmable clock frequency · CPC title

  • Arrangements for executing specific programs · CPC title

  • Tabulators · CPC title

  • using a plugboard for programming · CPC title

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9760113B2 cover?
An application runs at a first operating frequency if the application is designed for a current version of a system and runs at a second operating frequency if the application is designed for a prior version of the system that operates at a lower frequency than the first operating frequency. The second operating frequency may be higher than the operating frequency of the prior version of the sy…
Who is the assignee on this patent?
Sony Interactive Entertainment America Llc
What technology area does this patent fall under?
Primary CPC classification G06F1/08. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).