Countermeasure to power analysis attacks through time-varying impedance of power delivery networks

US9755822B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9755822-B2
Application numberUS-201414307453-A
CountryUS
Kind codeB2
Filing dateJun 17, 2014
Priority dateJun 19, 2013
Publication dateSep 5, 2017
Grant dateSep 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and system for a countermeasure to power analysis attacks, where an impedance element is coupled to a power source providing power to a cryptographic module causing a measurable power supply noise, a timing sequence is generated, and the impedance element is decoupled from the power source based on the timing sequence to cause the measurable power supply noise to vary according to the timing sequence.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for a countermeasure to a power analysis attack, the method comprising: coupling a plurality of impedance elements to a pair of nodes of a power delivery network coupled between a power source and an integrated circuit, the power source providing power to a cryptographic device integrated within the integrated circuit, the cryptographic device causing a measurable power supply noise; generating a timing sequence based on an activity of the cryptographic device; and selectively decoupling one or more of the plurality of impedance elements from the pair of nodes of the power delivery network according to the timing sequence to cause the measurable power supply noise to vary according to the timing sequence when an operation of the cryptographic device is being performed, the measurable power supply noise varying based on a number of the one or more of the plurality of impedance elements that are selectively decoupled according to the timing sequence. 2. The method of claim 1 , wherein the selectively decoupling the one or more of the impedance elements comprises selectively decoupling the one or more impedance elements using a switching element that switches according to the timing sequence. 3. The method of claim 2 , wherein the switching element comprises a transistor. 4. The method of claim 1 , wherein the one or more impedance elements are located on at least one of the integrated circuit coupled to the power source, in a package coupled to the power source, or on a printed circuit board coupled to the power source. 5. The method of claim 1 further comprising: coupling an additional impedance element coupled to the pair of nodes of the power delivery networked coupled between the power source and the integrated circuit; generating an additional timing sequence; and selectively decoupling the additional impedance element from the pair of nodes of the power delivery network according to the additional timing sequence to cause the measurable power supply noise to further vary according to the additional timing sequence. 6. The method of claim 1 , wherein the timing sequence is further based on a sequence from a random number generator, which is independent of activities of the cryptographic device. 7. The method of claim 1 , wherein the one or more impedance elements comprises a capacitor or an inductor. 8. The method of claim 1 , wherein the power supply noise varies in amplitude and phase according to the timing sequence. 9. The method of claim 1 , wherein the generating of the timing sequence is further based on a value that is updated a plurality of times while the operation of the cryptographic device is being performed. 10. The method of claim 1 , wherein an amplitude associated with the measurable power supply noise decreases when the number of the one or more of the plurality of impedance elements that are selectively decoupled according to the timing sequence increases. 11. A system for a countermeasure to a power analysis attack, the system comprising: an integrated circuit comprising cryptographic circuitry; a pair of power supply pads coupled to the integrated circuit and configured to supply power to the integrated circuit from a power source; a portion of a power delivery network disposed on the integrated circuit, the portion of the power delivery network is coupled to the pair of power supply pads, wherein the portion comprises components to provide or shunt power in response to changes in power demand of the integrated circuit, wherein the cryptographic circuitry causes a measurable power supply noise; a time-varying impedance subcircuit selectively coupled to and decoupled from the portion of the delivery network, the time-varying impedance subcircuit comprises: a plurality of impedance elements configured to be coupled to and decoupled from the pair of power supply pads when providing power to the cryptographic circuitry that causes the measurable power supply noise; a plurality of switching elements coupled to the plurality of impedance elements; and a timing sequence generator circuit coupled to the plurality of switching elements, the timing sequence generator circuit to generate a timing sequence based on an activity of the cryptographic circuitry, wherein one or more of the impedance elements are decoupled from the pair of power supply pads via one or more of the plurality of switching elements based on the timing sequence to cause the measurable power supply noise to vary according to the timing sequence when an operation of the cryptographic circuitry is being performed, the measurable power supply noise varying based on a number of the one or more of the plurality of impedance elements that are selectively decoupled via the one or more of the plurality of switching elements based on the timing sequence. 12. The system of claim 11 further comprising: an additional impedance element configured to be coupled to the power source; and an additional timing sequence generator circuit to generate an additional timing sequence, wherein the additional impedance element is selectively decoupled from the power source based on the additional timing sequence to cause the measurable power supply noise to further vary according to the additional timing sequence. 13. The system of claim 11 , wherein the timing sequence is further based on a sequence from a random number generator circuit, which is independent of activities of the cryptographic circuitry. 14. The system of claim 11 , wherein each of the impedance elements comprises a capacitor or an inductor. 15. The system of claim 11 , wherein the portion of the power delivery network comprises a decoupling capacitor coupled between the pair of power supply pads, a decoupling resistor coupled in series with the decoupling capacitor, and a current source coupled in parallel between the pair of power supply pads, and wherein the time-varying impedance subcircuit is selectively coupled to and decoupled from the pair of power supply pads in parallel with the decoupling capacitor. 16. The system of claim 15 , wherein the portion of the power delivery network is to provide additional power to the integrated circuit when power demand of the integrated circuit increases or to shunt excess power from the integrated circuit when the power demand of the integrated circuit decreases, and wherein the time-varying impedance subcircuit is to vary the power of the power delivery network to vary the measurable power supply noise according to the timing sequence. 17. The system of claim 15 , wherein the portion of the power delivery network is to increase or decrease the power supplied to the integrated circuit, and wherein the time-varying impedance subcircuit is to vary the measurable power supply noise on the power supplied to the integrated circuit. 18. The system of claim 15 , wherein the decoupling capacitor is to respond to changes in power demand of the integrated circuit by providing additional power or shunting excess power to reduce an amplitude of the power supply noise, and wherein the time-varying impedance subcircuit is to vary the amplitude, a phase, or both of the power supplied to the integrated circuit. 19. An apparatus comprising: a portion of a power delivery network coupled to a power supply during operation; a cryptographic device comprising a cryptographic circuit to execute a cryptographic operation, wherein the cryptographic circuit is powered by power supplied to the cryptographic device via the portion of the power delivery n

Assignees

Inventors

Classifications

  • Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) · CPC title

  • H04L9/003Primary

    for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA] · CPC title

  • Details relating to cryptographic hardware or logic circuitry · CPC title

  • with measures against power attack · CPC title

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What does patent US9755822B2 cover?
A method and system for a countermeasure to power analysis attacks, where an impedance element is coupled to a power source providing power to a cryptographic module causing a measurable power supply noise, a timing sequence is generated, and the impedance element is decoupled from the power source based on the timing sequence to cause the measurable power supply noise to vary according to the …
Who is the assignee on this patent?
Cryptography Res Inc
What technology area does this patent fall under?
Primary CPC classification H04L9/003. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).