Generating and checking a quaternary pseudo random binary sequence

US9755792B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9755792-B1
Application numberUS-201615149937-A
CountryUS
Kind codeB1
Filing dateMay 9, 2016
Priority dateMay 9, 2016
Publication dateSep 5, 2017
Grant dateSep 5, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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An apparatus and method relate generally to generation and checking of a quaternary pseudo random binary sequence (“QPRBS”). In an apparatus, there is a pseudo random binary sequence (“PRBS”) generator configured to receive a seed of a PRBS to be generated. A mask generator is configured to generate a mask output corresponding to the PRBS. The PRBS generator and the mask generator are both configured for sequential operation with respect to one another. A masking circuit is configured to receive the mask output and the PRBS to bitwise mask the PRBS with the mask output to generate the QPRBS.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for generation of a quaternary pseudo random binary sequence (“QPRBS”), comprising: a pseudo random binary sequence (“PRBS”) generator configured to receive a seed of a PRBS to be generated; a mask generator configured to receive a count value for the PRBS and generate a mask output corresponding to the PRBS based on the count value; the PRBS generator and the mask generator both being configured for sequential operation with respect to one another; and a masking circuit configured to receive the mask output and the PRBS to bitwise mask the PRBS with the mask output to generate the QPRBS. 2. The apparatus according to claim 1 , wherein the mask generator comprises: a first counter configured to receive the count value and to provide a feedforward count; an adder to add the feedforward count to an integer width value of the mask output to increment the feedforward count to provide a feedback count; the first counter configured to receive the feedback count to sequentially provide as the feedforward count; a second counter configured to receive the feedback count to count modulus the integer width value to provide a remainder; and a combinatorial circuit configured to receive the feedback count to determine whether an end of the PRBS is reached to assert a sequence reset. 3. The apparatus according to claim 2 , wherein the combinatorial circuit comprises: a comparator configured to receive the feedback count for comparison of a k-th bit position value in the feedback count with a logic value indicative of the feedback count being greater than 2^k−1 for k an integer for a PRBS-k sized version of the PRBS; and the comparator configured to assert the sequence reset responsive to the k-th bit position in the feedback count being equal to the logic value. 4. The apparatus according to claim 2 , wherein: the first counter and the second counter are configured to receive the sequence reset to reset the first counter and the second counter; and the first counter is configured to receive the remainder to increment the count value to provide the feedforward count anew after reset responsive to assertion of the sequence reset. 5. The apparatus according to claim 2 , wherein the mask generator comprises: a bit mask shifter configured to output a pre-mask output and to receive the remainder; the bit mask shifter further configure to output either all logic zeroes or all logic ones during a non-transition state and to shift in a number of either logic zeros or logic ones responsive to the remainder indicating an overlap between adjacent pseudo random binary sequences output from the PRBS generator within the integer width value to provide the pre-mask output during a transition state; and a polarity inverter configured to receive the sequence reset to invert a current polarity of the pre-mask output to provide the mask output. 6. The apparatus according to claim 5 , wherein: the combinatorial circuit is a first combinatorial circuit; the masking circuit is a second combinatorial circuit; and the second combinatorial circuit is configured to receive the mask output from the polarity inverter and to receive the PRBS from the PRBS generator to bitwise mask at least one symbol at a time of the PRBS to generate the QPRBS. 7. The apparatus according to claim 6 , wherein the combinatorial circuit comprises a plurality of exclusive-OR (“XOR”) gates configured for bitwise exclusive disjunction of each bit of the at least one symbol with a corresponding bit of the mask output from the polarity inverter. 8. An apparatus for checking a quaternary pseudo random binary sequence (“QPRBS”), comprising: a QPRBS generator comprising: a pseudo random binary sequence (“PRBS”) generator configured to receive a seed for a PRBS to be generated; a mask generator configured to receive a count value for the PRBS to generate a mask output; the PRBS generator and the mask generator both configured for sequential operation with respect to one another; and a first masking circuit configured to receive the mask output and the PRBS to bitwise mask the PRBS with the mask output to generate the QPRBS; a select circuit configured to receive data to selectively invert or not invert the data received to output as the seed; a controller configured to control operation of the QPRBS generator responsive to an error mask and to select the seed output from the select circuit; and a second masking circuit configured to receive the data and the QPRBS to bitwise mask the received data with the QPRBS to generate the error mask. 9. The apparatus according to claim 8 , wherein the second masking circuit is an error masking circuit configured to bitwise mask at least one symbol at a time of each of the QPRBS and the data to generate the error mask. 10. The apparatus according to claim 9 , wherein the controller is a finite state machine configured to check for an inversion in the received data responsive to the error mask. 11. The apparatus according to claim 10 , wherein the finite state machine is configured to: determine a number of logic ones in a remainder to provide a ones count; load the ones count into a sequence position counter of the mask generator as a set count; and invert polarity of the mask generator. 12. A method for generation of a quaternary pseudo random binary sequence (“QPRBS”), comprising: obtaining by a pseudo random binary sequence (“PRBS”) generator a seed of a PRBS to be generated; receiving a count value corresponding to the PRBS by a mask generator; generating the PRBS with the PRBS generator; generating a mask output for the PRBS based on the count value with the mask generator; the PRBS generator and the mask generator being sequentially operated together for the generating of the PRBS and the mask output; and bitwise masking with a masking circuit the PRBS with the mask output to generate the QPRBS. 13. The method according to claim 12 , wherein the generating of the mask output comprises: obtaining by a counter the count value; generating with the counter a feedforward count; incrementing with an adder the feedforward count by a width value; determining whether the feedforward count incremented indicates an end of the PRBS; and for the end of the PRBS not being determined, receiving the feedforward count incremented as a feedback count by the counter for another iteration of the incrementing. 14. The method according to claim 13 , wherein the generating of the mask output comprises: for the end of the PRBS being determined, setting a remainder to the incremented count modulus of the width value; and inverting a polarity associated with the PRBS. 15. The method according to claim 14 , wherein the generating of the mask output comprises: bit shifting a bit mask responsive to the remainder; and applying the inverted polarity to the bit mask bit-shifted for providing the mask output. 16. The method according to claim 12 , wherein the QPRBS is a receiver-generated QPRBS, the method further comprising checking a receiver-received QPRBS against the receiver-generated QPRBS. 17. The method according to claim 16 , wherein the checking comprises: selectively inverting the receiver-received QPRBS for input to the PRBS generator as the seed of the receiver-generated QPRBS to be generated; using the receiver-received QPRBS without inversion for a first polarity; and using the receiver-received QPRBS with inversion for a second polarity opposite the first polarity. 18. The method accord

Assignees

Inventors

Classifications

  • G06F7/582Primary

    Pseudo-random number generators · CPC title

  • using multilevel codes · CPC title

  • H04L1/244Primary

    test sequence generators · CPC title

  • Arrangements at the transmitter end · CPC title

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What does patent US9755792B1 cover?
An apparatus and method relate generally to generation and checking of a quaternary pseudo random binary sequence (“QPRBS”). In an apparatus, there is a pseudo random binary sequence (“PRBS”) generator configured to receive a seed of a PRBS to be generated. A mask generator is configured to generate a mask output corresponding to the PRBS. The PRBS generator and the mask generator are both conf…
Who is the assignee on this patent?
Xilinx Inc
What technology area does this patent fall under?
Primary CPC classification G06F7/582. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).