Testing tone free close loop notch frequency calibration for delta-sigma data converters

US9755677B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9755677-B2
Application numberUS-201715434000-A
CountryUS
Kind codeB2
Filing dateFeb 15, 2017
Priority dateNov 6, 2014
Publication dateSep 5, 2017
Grant dateSep 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A cellular radio architecture that includes a receiver module having a delta-sigma modulator that converts analog signals to digital signals and a Fast-Fourier transform (FFT) circuit that converts the digital signals to frequency spectrum signals. The architecture also includes a moving average circuit that smoothes out the frequency spectrum signals by applying a moving average to the signals. The architecture further includes a differentiator circuit that differentiates the frequency spectrum signals to make the signals linear, and a minimum finding circuit that converts the differentiated frequency spectrum signals into positive values for frequencies above a notch frequency in the differentiated signals and negative values for frequencies below the notch frequency in the differentiated signals. A transition between the positive and negative values is compared to a desired notch frequency value, and if the difference is greater than a predetermined threshold, an adaptive control circuit calibrates the modulator.

First claim

Opening claim text (preview).

What is claimed is: 1. A receiver module for a front-end circuit of a radio, said receiver module comprising: an analog-to-digital converter (ADC) that converts analog signals to digital signals; a Fast-Fourier transform (FFT) circuit responsive to the digital signals from the ADC and converting the digital signals to frequency spectrum signals; a moving average circuit responsive to the frequency spectrum signals from the FFT circuit, said moving average circuit smoothing out the frequency spectrum signals by applying a moving average to the frequency spectrum signals; a differentiator circuit responsive to the smoothed frequency spectrum signals from the moving average circuit and differentiating the frequency spectrum signals to make the signals linear; a minimum finding circuit responsive to the differentiated frequency spectrum signals from the differentiator circuit and converting the differentiated frequency spectrum signals into a positive value for frequencies above a notch frequency in the differentiated signals and a negative value for frequencies below the notch frequency in the differentiated signals; and an adaptive control circuit responsive to the positive and negative values from the minimum finding circuit, said adaptive control circuit comparing a transition between the negative values and the positive values to a desired frequency value to identify a difference therebetween, and providing a calibration signal to the ADC if the difference is greater than a predetermined threshold value. 2. The receiver module according to claim 1 wherein the ADC is a delta-sigma modulator. 3. The receiver module according to claim 1 wherein the FFT circuit, the moving average circuit, the differentiator circuit, the minimum finding circuit and the adaptive control circuit all operate within a digital signal processor. 4. The receiver module according to claim 1 wherein the minimum finding circuit converts the differentiated frequency spectrum signals into a positive or negative value based on whether a slope of the differentiated frequency spectrum signals is positive or negative. 5. The receiver module according to claim 1 wherein the adaptive control circuit is a least-minimum-square (LMS)/gradient decent adaptive control circuit. 6. The receiver module according to claim 1 wherein the radio is a digital radio. 7. The receiver module according to claim 6 wherein the digital radio is a digital cellular radio. 8. The receiver module according to claim 7 wherein the digital cellular radio is a vehicle radio. 9. A receiver module for a front-end circuit of a radio, said receiver module comprising: a delta-sigma modulator that converts analog signals to digital signals; and a digital signal processor (DSP) that converts the digital signals to frequency spectrum signals, identifies a notch frequency in the frequency spectrum signals, compares the notch frequency to a predetermined desired frequency, and calibrates the delta-sigma modulator if the difference between the notch frequency and the desired frequency is greater than a predetermined threshold, wherein the DSP includes a Fast-Fourier transform (FFT) circuit that employs a Fast-Fourier transform to convert the digital signals to the frequency spectrum signals and a moving average circuit that smoothes out the frequency spectrum signals by applying a moving average to the frequency spectrum signals. 10. The receiver module according to claim 9 wherein the DSP includes a differentiator circuit that differentiates the frequency spectrum signals to make them linear. 11. The receiver module according to claim 10 wherein the DSP includes a minimum finding circuit that converts the differentiated frequency spectrum signals into a positive value for frequencies above the notch frequency and a negative value for frequencies below the notch frequency. 12. The receiver module according to claim 11 wherein the DSP includes an adaptive control circuit responsive to the positive and negative values from the minimum finding circuit, said adaptive control circuit comparing a transition between the negative values and the positive values to the desired frequency value to identify a difference therebetween, and providing a calibration signal to the delta-sigma modulator if the difference is greater than a predetermined threshold value. 13. The receiver module according to claim 9 wherein the radio is a digital cellular radio. 14. A method for calibrating an analog-to-digital converter (ADC) in a receiver module in a front-end circuit for a radio, said method comprising: converting analog signals to digital signals in the ADC; Fast-Fourier transforming the digital signals to frequency spectrum signals; smoothing out the frequency spectrum signals by applying a moving average to the frequency spectrum signals; differentiating the smooth frequency spectrum signals to make the signals linear; converting the differentiated frequency spectrum signals into a positive value for frequencies above a notch frequency in the differentiated signals and a negative value for frequencies below the notch frequency in the differentiated signals; comparing a transition between the positive and negative values to a desired notch frequency to provide a difference signal; determining whether the difference signal is greater than a predetermined threshold; and calibrating the ADC if the difference signal is greater than the threshold. 15. The method according to claim 14 wherein the ADC is a delta-sigma modulator. 16. The method according to claim 14 wherein the radio is a digital cellular radio.

Assignees

Inventors

Classifications

  • using a notch filter · CPC title

  • H04B1/1036Primary

    with automatic suppression of narrow band noise or interference, e.g. by using tuneable notch filters (H04B1/123 takes precedence; filter circuits H03H) · CPC title

  • specially adapted for use in vehicles (H04B1/3827 takes precedence) · CPC title

  • of transmitter output stages · CPC title

  • by the use of an LC circuit · CPC title

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What does patent US9755677B2 cover?
A cellular radio architecture that includes a receiver module having a delta-sigma modulator that converts analog signals to digital signals and a Fast-Fourier transform (FFT) circuit that converts the digital signals to frequency spectrum signals. The architecture also includes a moving average circuit that smoothes out the frequency spectrum signals by applying a moving average to the signals…
Who is the assignee on this patent?
Gm Global Tech Operations Llc
What technology area does this patent fall under?
Primary CPC classification H04B1/1036. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).