Insulated gate device discharging

Patent metadata

Field	Value
Publication number	US-9755636-B2
Application number	US-201514747886-A
Country	US
Kind code	B2
Filing date	Jun 23, 2015
Priority date	Jun 23, 2015
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

A large-power insulated gate switching device (e.g., MOSFET) is used for driving relatively large surges of pulsed power through a load. The switching device has a relatively large gate capacitance which is difficult to quickly discharge. A gate charging and discharging circuit is provided having a bipolar junction transistor (BJT) configured to apply a charging voltage to charge the gate of the switching device where the BJT is configured to also discontinue the application of the charging voltage. An inductive circuit having an inductor is also provided. The inductive circuit is coupled to the gate of the switching device and further coupled to receive the charging voltage such that application of the charging voltage to the inductive circuit is with a polarity that induces a first current to flow through the inductor in a direction corresponding to charge moving away from the gate and such that discontinuation of the application of the charging voltage to the inductive circuit induces a second current flowing through the inductor in the direction corresponding to charge moving away from the gate such that the second current discharges the gate of the switching device. Faster turn off of the switching device is thus made possible and is synchronized to the discontinuation of the charging voltage.

First claim

What is claimed is:

1. A method of charging and discharging a gate of an insulated gate switching device comprising:
activating a first transistor to apply a charging voltage to charge the gate of the switching device, the first transistor having a driving terminal connected directly to the gate of the switching device to apply said charging voltage, the first transistor further having a driven terminal coupled to a voltage source and a control terminal operable to selectively activate and deactivate the first transistor;
using the first transistor to also apply the charging voltage to an inductive circuit having an inductance, the inductive circuit being coupled to the gate of the switching device, the applying of the charging voltage to the inductive circuit being with a polarity that induces a first current to flow through the inductance in a direction corresponding to charge moving away from the gate; and
de-activating the first transistor to thereby discontinue the applying of the charging voltage to the inductive circuit and to the gate of the switching device;
wherein the discontinuing of the applying of the charging voltage to the inductive circuit induces a second current to flow through the inductance in the direction corresponding to charge moving away from the gate, the second current operating to discharge the gate of the switching device.

2. The method of claim 1 wherein the applying of the charging voltage is in response to receipt of a leading edge of an input pulse.

3. The method of claim 2 wherein the discontinuing of the applying of the charging voltage to the inductive circuit is in response to receipt of a trailing edge of the input pulse.

4. The method of claim 3 and further comprising:
maintaining a trickle current following through the inductance in the direction corresponding to charge moving away from the gate, the magnitude of the maintained trickle current being a function of the applied charging voltage and of at least a parasitic resistance included in the inductive circuit, the maintaining of the trickle current being limited to occur between the time of the applying of the charging voltage to charge the gate of the switching device and the time of the receipt of the trailing edge of the input pulse.

5. The method of claim 1 wherein the first transistor is a first bipolar junction transistor (first BJT).

6. The method of claim 5 and further comprising:
using a second BJT to additionally discharge the gate of the switching device at the time of said de-activating of the first transistor (the first BJT).

7. The method of claim 6 wherein the first BJT is an NPN transistor, the second BJT is a PNP transistor and an emitter terminal of the first BJT is connected to an emitter terminal of second BJT.

8. The method of claim 1 wherein the inductive circuit includes one or more non-inductive circuit elements operatively coupled to the inductance of the inductive circuit.

9. The method of claim 8 wherein the one or more non-inductive circuit elements in combination with the inductance define a Y-shaped network.

10. The method of claim 1 and further comprising:
applying an output current of the switching device to a laser light emitter.

11. The method of claim 10 and further comprising:
using the laser light emitter in a Time of Flight (TOF) determining system.

12. A circuit for charging and discharging a gate of an insulated gate field effect transistor (IGFET), the circuit comprising:
a first transistor configured to apply a charging voltage to charge the gate of the IGFET, the first transistor having a driving terminal connected directly to the gate of the IGFET to apply said charging voltage, the first transistor further having a driven terminal coupled to a voltage source and a control terminal operable to selectively activate and deactivate the first transistor, where deactivation of the first transistor operates to discontinue the application of the charging voltage; and
an inductive circuit having an inductance, the inductive circuit being coupled to the gate of the IGFET, the inductive circuit being further coupled and configured to receive the charging voltage such that application of the charging voltage to the inductive circuit is with a polarity that induces a first current to flow through the inductance in a direction corresponding to charge moving away from the gate and such that discontinuation of the application of the charging voltage to the inductive circuit induces a second current flowing through the inductance in the direction corresponding to charge moving away from the gate such that the second current discharges the gate of the IGFET.

13. The circuit of claim 12 wherein,
the first transistor is further configured to receive an input pulse having a leading edge, trailing edge and a plateau level interposed between the leading and trailing edges,
the configuration of the first transistor being such that the first transistor applies the charging voltage in response to receipt of the leading edge and discontinues application of the charging voltage in response to receipt of the trailing edge.

14. The circuit of claim 13 wherein,
the first transistor is further configured to supply a trickle current to inductive circuit while receiving the plateau level of the input pulse.

15. The circuit of claim 12 wherein,
the inductive circuit includes one or more non-inductive elements operatively coupled to the inductance of the inductive circuit.

16. The circuit of claim 15 wherein the more non-inductive elements in combination with the inductance define a Y-shaped network.

17. The circuit of claim 15 further comprising a second transistor, wherein the first transistor is an NPN bipolar junction transistor, the second transistor is a PNP bipolar junction transistor (BJT) and the second BJT is configured to partially discharge the gate of the IGFET.

18. A combination of an insulated gate field effect transistor (IGFET), a charging and discharging circuit coupled to a gate of the IGFET and a light emitter coupled to be driven by a current flow through the IGFET wherein:
the charging and discharging circuit comprises:
a first transistor configured to apply a charging voltage to charge the gate of the IGFET, the first transistor having a driving terminal connected directly to the gate of the IGFET to apply said charging voltage, the first transistor further having a driven terminal coupled to a voltage source and a control terminal operable to selectively activate and deactivate the first transistor, where deactivation of the first transistor operates to discontinue the application of the charging voltage; and
an inductive circuit having an inductance, the inductive circuit being coupled to the gate of the IGFET, the inductive circuit being further coupled and configured to receive the charging voltage such that application of the charging voltage to the inductive circuit is with a polarity that induces a first current to flow through the inductance in a direction corresponding to charge moving away from the gate and such that discontinuation of the application of the charging voltage to the inductive circuit induces a second current flowing through the inductance in the direction corresponding to charge moving away from the gate such that the second current discharges the gate of the IGFET; and wherein
the combination is configured to produce pulses of light having falling edges of durations less than 10 nanoseconds.

19. The combination of claim 18 and further comprising a Time

Assignees

• Wyland David C
• Dutra Jonathan Alan
• Microsoft Technology Licensing Llc

Inventors

• Wyland David C
• Dutra Jonathan Alan

Classifications

• H03K17/567 Primary

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• H03K5/1534

  Transition or edge detectors · CPC title

• H03K17/6877

  the control circuit comprising active elements different from those used in the output circuit · CPC title

• H03K17/04123

  in field-effect transistor switches · CPC title