Amplifier with boosted peaking

US9755599B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9755599-B2
Application numberUS-201514857802-A
CountryUS
Kind codeB2
Filing dateSep 17, 2015
Priority dateSep 17, 2015
Publication dateSep 5, 2017
Grant dateSep 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one implementation, an amplifier comprises a load circuit comprising a plurality of inductor cells, and a drive circuit configured to receive an input signal, and to drive the load circuit based on the input signal to generate an amplified signal. The amplifier also comprises a controller configured to tune a peaking gain of the amplifier by adjusting a number of the inductor cells that are enabled.

First claim

Opening claim text (preview).

What is claimed is: 1. An amplifier, comprising: a load circuit comprising a plurality of inductor cells, wherein each of the inductor cells has an impedance that is higher at a first frequency than at a second frequency, the first frequency being higher than the second frequency; a drive circuit configured to receive an input signal, and to drive the load circuit based on the input signal to generate an amplified signal; and a controller configured to adjust a number of the inductor cells that are enabled to tune a peaking gain of the amplifier. 2. The amplifier of claim 1 , wherein the inductor cells are progressively sized, and the controller is configured to increase the peaking gain by enabling progressively smaller ones of the inductor cells. 3. The amplifier of claim 1 , wherein the controller is configured to tune the peaking gain based on a peaking gain setting in a memory, the peaking gain setting corresponding to a number of the inductor cells to be enabled. 4. The amplifier of claim 1 , wherein the plurality of inductor cells comprises a first set of inductor cells coupled to a first output of the amplifier, and a second set of inductor cells coupled to a second output of the amplifier, the load circuit further comprises a first feedback capacitor having a first tunable capacitance and coupled between the first output of the amplifier and the second set of inductor cells, and a second feedback capacitor having a second tunable capacitance and coupled between the second output of the amplifier and the first set of inductor cells, and the controller is configured to tune the first and second capacitances of the first and second feedback capacitors, respectively, to tune the peaking gain. 5. The amplifier of claim 1 , wherein each of the inductor cells is configured to mimic an impedance characteristic of an inductor coil. 6. The amplifier of claim 1 , wherein the plurality of inductor cells comprising a first inductor cell, a second inductor cell having a smaller size than the first inductor cell, and a third inductor cell having a smaller size than the second inductor cell, and the controller is configured to set the peaking gain of the amplifier to a first peaking gain by enabling the first inductor cell, to set the peaking gain of the amplifier to a second peaking gain by enabling the first and second inductor cells, and to set the peaking gain of the amplifier to a third peaking gain by enabling the first, second and third inductor cells, the second peaking gain being greater than the first peaking gain, and the third peaking gain begin greater than the second peaking gain. 7. The amplifier of claim 6 , wherein the first inductor cell comprises a first inductor transistor, the second inductor cell comprises a second inductor transistor, and the third inductor cell comprises a third inductor transistor, the second inductor transistor having a smaller gate width than the first inductor transistor, and the third inductor transistor having a smaller gate width than the second inductor transistor. 8. An amplifier, comprising: a load circuit comprising a resistor and a plurality of inductor cells, wherein each of the inductor cells comprises: an inductor transistor having a drain, a gate and a source, wherein the resistor is coupled between the gate and the drain of the inductor transistor; and a first switch configured to selectively couple the source of the inductor transistor to a supply rail; a drive circuit configured to receive an input signal, and to drive the load circuit based on the input signal to generate an amplified signal, wherein the drive circuit is coupled to the drain of the inductor transistor of each of the inductor cells; and a controller configured to adjust a number of the inductor cells that are enabled to tune a peaking gain of the amplifier, wherein, for each of the inductor cells, the controller is configured to turn on the respective first switch to enable the inductor cell, and to turn off the respective first switch to disable the inductor cell. 9. The amplifier of claim 8 , wherein each of the inductor cells comprises: a diode-connected transistor having a drain, a gate and a source, wherein the gate and the drain of the diode-connected transistor are tied together, and the drain of the diode-connected transistor is coupled to the drive circuit; and a second switch configured to selectively couple the source of the diode-connected transistor to the supply rail, wherein the controller is configured to turn off the second switch to enable the inductor cell, and to turn on the second switch to disable the inductor cell. 10. The amplifier of claim 8 , wherein the resistor has a tunable resistance, and the controller is further configured to tune the resistance of the resistor to tune a frequency of the peaking gain. 11. The amplifier of claim 8 , wherein the load circuit further comprises a capacitor having a tunable capacitance, the capacitor is coupled between the source and the gate of the inductor transistor in each of the inductor cells, and the controller is further configured to tune the capacitance of the capacitor to tune a frequency of the peaking gain. 12. The amplifier of claim 8 , wherein the inductor transistor in each of the inductor cells comprises a p-type metal-oxide-semiconductor (PMOS) transistor. 13. A method for tuning a peaking gain of an amplifier, comprising: receiving an input signal; driving a load circuit of the amplifier based on the received input signal to generate an amplified signal, the load circuit comprising a plurality of inductor cells, wherein each of the inductor cells has an impedance that is higher at a first frequency than at a second frequency, the first frequency being higher than the second frequency; and tuning the peaking gain of the amplifier by adjusting a number of the inductor cells that are enabled. 14. The method of claim 13 , wherein the inductor cells are progressively sized, and tuning the peaking gain comprises increasing the peaking gain by enabling progressively smaller ones of the inductor cells. 15. The method of claim 13 , wherein tuning the peaking gain is based on a peaking gain setting in a memory, the peaking gain setting corresponding to a number of the inductor cells to be enabled. 16. The method of claim 13 , wherein the plurality of inductor cells comprises a first set of inductor cells coupled to a first output of the amplifier, and a second set of inductor cells coupled to a second output of the amplifier, the load circuit further comprises a first feedback capacitor having a first tunable capacitance and coupled between the first output of the amplifier and the second set of inductor cells, and a second feedback capacitor having a second tunable capacitance and coupled between the second output of the amplifier and the first set of inductor cells, and tuning the peaking gain further comprises tuning the first and second capacitances of the first and second feedback capacitors, respectively. 17. A method for tuning a peaking gain of an amplifier, comprising: receiving an input signal; driving a load circuit of the amplifier based on the received input signal to generate an amplified signal, the load circuit comprising a resistor and a plurality of inductor cells, wherein each of the inductor cells comprises an inductor transistor having a drain, a gate and a source, the resistor is coupled between the gate and the drain of the inductor transistor in each of the inductor cells; and tuning the peaking gain of the amplifier by adjusting a number of the inductor cells t

Assignees

Inventors

Classifications

  • Control of transmission; Equalising · CPC title

  • the LC comprising a cross coupling circuit, e.g. comprising two cross-coupled transistors · CPC title

  • the LC comprising one or more capacitors, e.g. coupling capacitors · CPC title

  • Line equalisers; line build-out devices · CPC title

  • H03G3/3036Primary

    in high-frequency amplifiers or in frequency-changers (H03G3/3052, H03G3/32, H03G3/34 take precedence) · CPC title

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What does patent US9755599B2 cover?
In one implementation, an amplifier comprises a load circuit comprising a plurality of inductor cells, and a drive circuit configured to receive an input signal, and to drive the load circuit based on the input signal to generate an amplified signal. The amplifier also comprises a controller configured to tune a peaking gain of the amplifier by adjusting a number of the inductor cells that are …
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H03G3/3036. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).