Interleaved switching power supply and control method for the same

Patent metadata

Field	Value
Publication number	US-9755521-B2
Application number	US-201514960726-A
Country	US
Kind code	B2
Filing date	Dec 7, 2015
Priority date	Dec 15, 2014
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

A control circuit for an interleaved switching power supply having a plurality of parallel coupled power stage circuits, can include: a feedback circuit that receives an output voltage of the interleaved switching power supply, and generates an output voltage feedback signal; a ripple generator that receives a plurality of switching control signals, and generates an AC ripple signal having a frequency that is N times a switching frequency; an adder circuit that adds the output voltage feedback signal with the AC ripple signal, and generates a superposition signal; a comparison circuit that receives the superposition signal and a reference voltage, and generates a comparison signal; and a frequency divider circuit that divides the comparison signal into a plurality of turn on control signals configured to control turn on of a plurality of main power switches in the plurality of power stage circuits.

First claim

What is claimed is:

1. A control circuit for an interleaved switching power supply having a plurality of parallel coupled power stage circuits, the control circuit comprising:
a) a feedback circuit configured to receive an output voltage of said interleaved switching power supply, and to generate an output voltage feedback signal;
b) a ripple generator configured to receive a plurality of switching control signals, and to generate an AC ripple signal having a frequency that is N times a switching frequency, wherein N is equal to a number of said plurality of power stage circuits;
c) a first adder circuit configured to add said output voltage feedback signal with said AC ripple signal, and to generate a superposition signal;
d) a comparison circuit configured to receive said superposition signal and a reference voltage, and to generate a comparison signal;
e) a frequency divider circuit configured to divide said comparison signal into a plurality of turn on control signals configured to control turn on of a plurality of main power switches in said plurality of power stage circuits, wherein at least two of said plurality of turn on control signals have a predetermined phase angle therebetween;
f) a current-sharing circuit configured to sample inductor currents in said plurality of power stage circuits, and to generate a current-sharing signal;
g) an on time calculator configured to receive said current-sharing signal and said plurality of turn on control signals, and to generate a plurality of turn off control signals configured to control turn off of said plurality of main power switches; and
h) a logic circuit configured to receive said plurality of turn on and turn off control signals, and to generate said plurality of switching control signals configured to control said plurality of main power switches.

2. The control circuit of claim 1 , wherein said ripple generator comprises:
a) a plurality of chopping circuits corresponding to said plurality of power stage circuits, and being configured to generate a plurality of chopped signals, wherein each chopping circuit is configured to chop a voltage source according to a corresponding of said plurality of switching control signals, and to generate a corresponding chopped signal;
b) a first filter circuit configured to filter said plurality of chopped signals, and to generate a first filtered signal having a phase that matches said inductor current in a corresponding of said plurality of power stage circuits;
c) a second filter circuit configured to generate a second filtered signal by smoothing said first filtered signal; and
d) a subtracting circuit configured to receive said first and second filtered signals, and to generate said AC ripple signal.

3. The control circuit of claim 2 , wherein said first filter circuit comprises a plurality of resistors, wherein each of said plurality of resistors has a first terminal coupled to an output terminal of said plurality of chopping circuits, and a second terminal coupled to a first terminal of a first capacitor, wherein a second terminal of said first capacitor is grounded, and wherein a voltage at said first terminal of said first capacitor is configured as said first filtered signal.

4. The control circuit of claim 2 , wherein said second filter circuit comprises a filter resistor having a first terminal that receives said first filtered signal, and a second terminal coupled to a first terminal of a second capacitor, wherein said second terminal of said second capacitor is grounded, and wherein a voltage at said first terminal of said second capacitor is configured as said second filter signal.

5. The control circuit of claim 1 , wherein said reference voltage comprises a fixed voltage signal generated by a reference circuit having a constant voltage source.

6. The control circuit of claim 1 , further comprising a reference circuit configured to generate said reference voltage, wherein said reference circuit comprises:
a) a ramp compensation circuit having a switch, a current source, and a compensation capacitor coupled in parallel, wherein said switch is controllable by said comparison signal to control charge and discharge of said compensation capacitor, and to generate a ramp compensation signal at one terminal of said compensation capacitor; and
b) a second adder circuit configured to receive said ramp compensation signal and a constant voltage generated by a constant voltage source, and to generate said reference voltage.

7. A method of controlling an interleaved switching power supply having a plurality of parallel coupled power stage circuits, the method comprising:
a) generating an output voltage feedback signal from an output voltage of said interleaved switching power supply;
b) receiving a plurality of switching control signals, and generating an AC ripple signal having a frequency that is N times a switching frequency, wherein N is equal to a number of said plurality of power stage circuits;
c) generating a superposition signal by adding said output voltage feedback signal with said AC ripple signal;
d) generating a comparison signal from said superposition signal and a reference voltage;
e) dividing said comparison signal into a plurality of turn on control signals for controlling turn on of a plurality of main power switches in said plurality of power stage circuits, wherein at least two of said plurality of turn on control signals have a predetermined phase angle therebetween;
f) generating a current-sharing signal from sampling inductor currents in said plurality of power stage circuits;
g) generating a plurality of turn off control signals for controlling turn off of said plurality of main power switches in response to said current-sharing signal and said plurality of turn on control signals; and
h) generating said plurality of switching control signals for controlling said plurality of main power switches in response to said plurality of turn on and turn off control signals.

8. A method of controlling an interleaved switching power supply having a plurality of parallel coupled power stage circuits, the method comprising:
a) generating an output voltage feedback signal from an output voltage of said interleaved switching power supply;
b) receiving a plurality of switching control signals, and generating an AC ripple signal having a frequency that is N times a switching frequency, wherein N is equal to a number of said plurality of power stage circuits;
c) generating a superposition signal by adding said output voltage feedback signal with said AC ripple signal;
d) generating a comparison signal from said superposition signal and a reference voltage;
e) dividing said comparison signal into a plurality of turn on control signals for controlling turn on of a plurality of main power switches in said plurality of power stage circuits, wherein at least two of said plurality of turn on control signals have a predetermined phase angle therebetween;
f) generating a plurality of chopped signals by chopping a voltage source according to a corresponding of said plurality of switching control signals;
g) generating, by filtering said plurality of chopped signals, a first filtered signal having a phase that matches said inductor current in a corresponding of said plurality of power stage circuits;
h) generating a second filtered signal by smoothing said first filtered signal; and
i) generating said AC ripple signal from said first and second filtered signals.

Assignees

• Silergy Semiconductor Technology Hangzhou Ltd

Inventors

• Cai Yongbin
• Chen Shengjun

Classifications

• H02M2001/0025

  Electricity · mapped topic

• H02M1/14

  Arrangements for reducing ripples from DC input or output · CPC title

• H02M3/1584 Primary

  with a plurality of power processing stages connected in parallel · CPC title

• H02M2003/1586

  Electricity · mapped topic

• H02M3/10 Primary

  using discharge tubes with control electrode or semiconductor devices with control electrode (H02M3/07 takes precedence) · CPC title