Battery protection integrated circuit and circuit characteristic setting method

Patent metadata

Field	Value
Publication number	US-9755442-B2
Application number	US-201514953544-A
Country	US
Kind code	B2
Filing date	Nov 30, 2015
Priority date	Jun 17, 2015
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

A battery protection IC has detection circuits to detect faults of an overcharge, an over-discharge, and an overcurrent of a secondary battery; a control circuit to protect the secondary battery, by controlling (dis)charging the secondary battery upon the fault; and a delay circuit to generate delay after the fault before the controlling. The IC includes a memory unit to store data for setting and adjusting a circuit characteristic of the IC; and a setting circuit to set and adjust the circuit characteristic, based on the data from the memory unit. The memory unit includes a pair of non-volatile memory cells to complementarily store one bit, and a latch circuit directly cross-coupled with the memory cells, for each bit of the data. The latch circuit statically outputs the data from the memory cells to the setting circuit when the IC is turned on.

First claim

What is claimed is:

1. A battery protection IC, including
an overcharge detection circuit configured to detect an overcharge of a secondary battery,
an over-discharge detection circuit configured to detect an over-discharge of the secondary battery,
an overcurrent detection circuit configured to detect an overcurrent of the secondary battery,
a control circuit configured to protect the secondary battery, by controlling charging and discharging the secondary battery when at least one fault is detected among the overcharge, the over-discharge and the overcurrent, and
a delay circuit configured to generate a delay time to be passed before controlling charging and discharging the secondary battery after the fault has been detected,
comprising:
a memory unit configured to store both data of characteristic setting data for setting a circuit characteristic of the battery protection IC, and characteristic adjustment data for adjusting an individual difference of the circuit characteristic of the battery protection IC; and
a setting circuit configured to automatically set the circuit characteristic, and to adjust the individual difference, based on both of said data output from the memory unit,
wherein the memory unit includes
a set of a pair of non-volatile memory cells to complementarily store one bit, and a latch circuit having direct cross-coupled connections with outputs of the pair of memory cells, provided for each bit of both of said data,
wherein the latch circuit automatically statically outputs the data stored in the memory cells provided for both of said data to the setting circuit when a power source of the battery protection IC rises.

2. A battery protection IC, including
an overcharge detection circuit configured to detect an overcharge of a secondary battery,
an over-discharge detection circuit configured to detect an over-discharge of the secondary battery,
an overcurrent detection circuit configured to detect an overcurrent of the secondary battery,
a control circuit configured to protect the secondary battery, by controlling charging and discharging the secondary battery when at least one fault is detected among the overcharge, the over-discharge and the overcurrent, and
a delay circuit configured to generate a delay time to be passed before controlling charging and discharging the secondary battery after the fault has been detected,
comprising:
a memory unit configured to store at least one of data among characteristic setting data for setting a circuit characteristic of the battery protection IC, and characteristic adjustment data for adjusting an individual difference of the circuit characteristic of the battery protection IC; and
a setting circuit configured to automatically set the circuit characteristic, and to adjust the individual difference, based on said one of data output from the memory unit,
wherein the memory unit includes
a set of a pair of non-volatile memory cells to complementarily store one bit, and a latch circuit having direct cross-coupled connections with outputs of the pair of memory cells, provided for each bit of said one of data,
wherein the latch circuit automatically statically outputs the data stored in the memory cells provided for said one of data to the setting circuit when a power source of the battery protection IC rises.

3. The battery protection IC as claimed in claim 1 , wherein the circuit characteristic includes at least one characteristic among a threshold voltage for detection of the overcharge, a threshold voltage for detection of the over-discharge, a threshold voltage for detection of the overcurrent, and the delay time.

4. The battery protection IC as claimed in claim 1 , further comprising:
a selector transistor configured to be disposed between the memory cell, and a memory power supply or a ground, to select the memory cell from which data is statically output.

5. The battery protection IC as claimed in claim 1 , wherein the latch circuit includes a first MOS transistor of a first conductive type, and a second MOS transistor of the first conductive type, cross-coupled and connected with each other.

6. The battery protection IC as claimed in claim 5 , wherein the latch circuit includes
a first MOS transistor of a second conductivity type inserted between the first MOS transistor of the first conductive type and one of the pair of memory cells, and having a control terminal connected with a control terminal of the first MOS transistor of the first conductive type, and
a second MOS transistor of the second conductivity type inserted between the second MOS transistor of the first conductive type and another of the pair of memory cells, and having a control terminal connected with a control terminal of the second MOS transistor of the first conductive type.

7. The battery protection IC as claimed in claim 5 , wherein the latch circuit includes
a first MOS transistor of a second conductivity type inserted between a memory power supply and one of the pair of memory cells, and having a control terminal connected with a control terminal of the first MOS transistor of the first conductive type, and
a second MOS transistor of the second conductivity type inserted between the memory power supply and another of the pair of memory cells, and having a control terminal connected with a control terminal of the second MOS transistor of the first conductive type.

8. The battery protection IC as claimed in claim 1 , further comprising:
a write protection circuit configured to inhibit a write into the pair of memory cells.

9. A circuit characteristic setting method executed in a battery protection IC configured to protect a secondary battery, by controlling charging and discharging the secondary battery, after a delay time has passed since at least one fault has been detected among an overcharge of a secondary battery, an over-discharge of the secondary battery, and an overcurrent of the secondary battery,
the method comprising:
having a memory unit output at least one of data among characteristic setting data for setting a circuit characteristic of the battery protection IC, and characteristic adjustment data for adjusting an individual difference of the circuit characteristic of the battery protection IC, to have a setting circuit automatically set the circuit characteristic, or adjust the individual difference,
wherein the memory unit includes a set of a pair of non-volatile memory cells to complementarily store one bit, and a latch circuit having direct cross-coupled connections with outputs of the pair of memory cells, provided for each bit of said one of data, and
automatically statically outputting the data stored in the memory cells provided for said one of data to the setting circuit when a power source of the battery protection IC rises.

10. A battery protection IC, including
an overcharge detection circuit configured to detect an overcharge of a secondary battery,
an over-discharge detection circuit configured to detect an over-discharge of the secondary battery,
an overcurrent detection circuit configured to detect an overcurrent of the secondary battery,
a control circuit configured to protect the secondary battery, by controlling charging and discharging the secondary battery when at least one fault is detected among the overcharge, the over-discharge and the overcurrent, and
a delay circuit configured to generate a delay time to be passed before controlling charging and discharging the secondary battery after the fault has been detected,
comprising:
a memory unit configured to store at least one of data among characteristic setting data for setting a circuit characteristic of the battery protection IC, and characteris

Assignees

• Kageyama Ryota
• Yamauchi Tsutomu
• Tanaka Nobuhito
• Takeda Takashi
• Satake Yoshihiro
• Yamaguchi Takeshi
• Koshimizu Koji
• Kawaguchi Norihito
• Mitsumi Electric Co Ltd

Inventors

• Kageyama Ryota
• Yamauchi Tsutomu
• Tanaka Nobuhito
• Takeda Takashi
• Satake Yoshihiro
• Yamaguchi Takeshi
• Koshimizu Koji
• Kawaguchi Norihito

Classifications

• H02J7/663

  using battery or load disconnect circuits (H02J9/002 takes precedence) · CPC title

• H02J7/54

  Passive balancing, e.g. using resistors or parallel MOSFETs · CPC title

• H02J7/92

  with prioritisation of loads or sources · CPC title

• H02J7/63

  against overdischarge · CPC title

• H02J7/62

  against overcurrent · CPC title