NEMS devices with series ferroelectric negative capacitor

Patent metadata

Field	Value
Publication number	US-9755041-B2
Application number	US-201514701502-A
Country	US
Kind code	B2
Filing date	Apr 30, 2015
Priority date	Apr 30, 2014
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

An electrical circuit comprising at least two negative capacitance insulators connected in series, one of the two negative capacitance insulators is biased to generate a negative capacitance. One of the negative capacitance insulators may include an air-gap which is part of a nanoelectromechnical system (NEMS) device and the second negative capacitance insulator includes a ferroelectric material. Both of the negative capacitance insulators may be located between the channel and gate of a field effect transistor. The NEMS device may include a movable electrode, a dielectric and a fixed electrode and arranged so that the movable electrode is attached to at least two points and spaced apart from the dielectric and fixed electrode, and the ferroelectric capacitor is electrically connected to either of the electrodes.

First claim

The invention claimed is:

1. An electrical circuit comprising at least two negative capacitance insulators connected in series, at least one of the two negative capacitance insulators is biased to generate a negative capacitance, wherein a first one of the negative capacitance insulators includes an air-gap which is part of a nanoelectromechanical system (NEMS) device and a second one of the negative capacitance insulators includes a ferroelectric material, wherein the NEMS device includes a movable electrode, a dielectric and a fixed electrode and arranged so that the movable electrode is attached to at least two points and spaced apart from the dielectric and fixed electrode, and the second one of the negative capacitance insulators is electrically connected to either of the electrodes.

2. The electrical circuit of claim 1 where both of the negative capacitance insulators are located between the channel and gate of a field effect transistor.

3. The electrical circuit of claim 1 , wherein the circuit has a hysteresis characteristics that is centered around zero volts.

4. The electrical circuit of claim 1 , wherein the circuit is configured as an electronic non-volatile memory device.

5. The electrical circuit of claim 1 , wherein the circuit is configured as an electronic display device.

6. The electrical circuit of claim 1 , wherein the circuit is configured as an electronic switch.

7. An electrical circuit comprising at least two negative capacitance insulators connected in series, at least one of the two negative capacitance insulators is biased to generate a negative capacitance, wherein a first one of the negative capacitance insulators includes an air-gap which is part of a nanoelectromechanical system (NEMS) device and a second one of the negative capacitance insulators includes a ferroelectric material, wherein the NEMS device includes a movable electrode, a dielectric and a fixed electrode and arranged so that the movable electrode is attached to at least one point in a cantilevered fashion and spaced apart from the dielectric and fixed electrode, and the second one of the negative capacitance insulators is electrically connected to either of the electrodes.

8. The electrical circuit of claim 7 where both of the negative capacitance insulators are located between the channel and gate of a field effect transistor.

9. The electrical circuit of claim 7 , wherein the circuit has a hysteresis characteristic that is centered around zero volts.

10. The electrical circuit of claim 7 , wherein the circuit is configured as an electronic non-volatile memory device.

11. The electrical circuit of claim 7 , wherein the circuit is configured as an electronic display device.

12. The electrical circuit of claim 7 , wherein the circuit is configured as an electronic switch.

Assignees

• Purdue Research Foundation

Inventors

• Alam Muhammad Ashraful
• Masuduzzaman Muhammad
• Jain Ankit

Classifications

• B81B2201/07

  Data storage devices, static or dynamic memories · CPC title

• H01G5/40

  Structural combinations of variable capacitors with other electric elements not covered by this subclass, the structure mainly consisting of a capacitor, e.g. RC combinations · CPC title

• H01G5/16

  using variation of distance between electrodes · CPC title

• B81B2201/016

  having a bridge fixed on two ends and connected to one or more dimples · CPC title

• H01G4/38

  Multiple capacitors, i.e. structural combinations of fixed capacitors · CPC title