Image sensors including conductive pixel separation structures and methods of fabricating the same

Patent metadata

Field	Value
Publication number	US-9754994-B2
Application number	US-201615349227-A
Country	US
Kind code	B2
Filing date	Nov 11, 2016
Priority date	Mar 4, 2013
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

An image sensor includes a substrate having adjacent pixel regions and respective photodiode regions therein, and a pixel separation portion including a trench extending into the substrate between the adjacent pixel regions. The trench includes a conductive common bias line therein and an insulating device isolation layer between the common bias line and surfaces of the trench. A conductive interconnection is coupled to the common bias line and is configured to provide a negative voltage thereto. Related fabrication methods are also discussed.

First claim

What is claimed is:

1. A method of fabricating an image sensor, comprising:
forming a pixel separation structure in a substrate to define pixel regions, the substrate having a first surface and a second surface opposite the first surface, wherein the second surface is arranged to receive incident light and wherein the pixel separation structure comprises a common bias line and a device isolation layer on the common bias line and extends from the first surface towards the second surface but not completely through the substrate; and
forming a photoelectric conversion part and a gate electrode in or on each of the pixel regions.

2. The method of claim 1 , wherein the forming the pixel separation structure comprises:
etching a portion of the substrate adjacent the first surface to form a trench;
forming the device isolation layer to conform to side and bottom surfaces of the trench; and
forming the common bias line to fill the trench.

3. The method of claim 1 , wherein the forming the pixel separation structure comprises:
etching a portion of the substrate adjacent the second surface to form a trench;
forming the device isolation layer to conform to side and bottom surfaces of the trench; and
forming the common bias line to fill the trench.

4. The method of claim 3 , wherein the substrate further comprises an optical black region spaced apart from the pixel regions, and wherein the method further comprises:
forming an insulating layer to cover the second surface; and
forming an optical black pattern in the insulating layer on the optical black region and an external-voltage-applying wire connected to the common bias line.

5. The method of claim 3 , wherein the substrate further comprises a pad region spaced apart from the pixel regions, and wherein the method further comprises:
forming an insulating layer to cover the second surface; and
forming a through via and an external-voltage-applying wire, wherein the through via extends into the insulating layer and the pad region of the substrate, and the external-voltage-applying wire is connected to the common bias line.

6. The method of claim 3 , further comprising forming a channel stop region between the device isolation layer and the second surface of the substrate.

7. The method of claim 6 :
wherein forming the channel stop region comprises:
forming a trench in the substrate; and
implanting ions in the substrate through the bottom of the trench to form the channel stop region; and

wherein forming the pixel separation structure comprises forming the device isolation layer and the common bias line in the trench.

8. A method of forming an image sensor, the method comprising:
forming a trench that extends into a substrate from a first side of the substrate and that defines a plurality of pixel regions in the substrate;
forming a device isolation layer conforming to a bottom and side walls of the trench;
forming a conductive bias line in the device isolation layer in the trench;
thinning the substrate by removing a portion of the substrate on a second side of the substrate without exposing the device isolation layer; and
forming an optical layer structure on the second side of the substrate.

9. The method of claim 8 , further comprising forming a channel stop region in the substrate between the bottom of the trench and a surface of the substrate on the second side of the substrate.

10. The method of claim 9 , wherein forming the channel stop region comprises implanting ions into the substrate at the bottom of the trench before forming the device isolation layer.

11. The method of claim 9 , wherein thinning the substrate by removing a portion of the substrate on a second side of the substrate without exposing the device isolation layer comprises exposing the channel stop region.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Koo Junemo
• Kim Namgil
• Moon Changrok
• Park Byungjun
• Shin Jongcheol

Classifications

• H01L27/14623

  Electricity · mapped topic

• H01L27/1464

  Electricity · mapped topic

• H01L27/1463

  Electricity · mapped topic

• H01L27/14614

  Electricity · mapped topic

• H01L27/14689 Primary

  Electricity · mapped topic