Multislot link layer flit wherein flit includes three or more slots whereby each slot comprises respective control field and respective payload field

Patent metadata

Field	Value
Publication number	US-9753885-B2
Application number	US-201314437612-A
Country	US
Kind code	B2
Filing date	Mar 16, 2013
Priority date	Oct 22, 2012
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

Transaction data is identified and a flit is generated to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots. The flit is sent over a serial data link to a device for processing, based at least in part on the three or more slots.

First claim

What is claimed is:

1. An apparatus comprising:
I/O logic, implemented at least in part in hardware circuitry, the I/O logic to:
identify transaction data;
generate a flit based on the transaction data and according to a defined format, wherein the format defines that the flit is to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots, wherein each of the three or more slots comprises a respective control field and a respective payload field, and the floating field is to extend one of the payload fields of the three or more slots; and
transmit the flit.

2. The apparatus of claim 1 , wherein the I/O logic comprises a layered stack comprising physical layer logic, link layer logic, and protocol layer logic.

3. The apparatus of claim 1 , wherein the three or more slots consist of three defined slots.

4. The apparatus of claim 3 , wherein the flit comprises 192 bits.

5. The apparatus of claim 4 , wherein the first of the three slots comprises 72 bits, the second of the three slots comprises 70 bits, and third slot comprises 18 bits.

6. The apparatus of claim 5 , wherein the first slot and second slot each include a respective 50 bit payload field.

7. The apparatus of claim 6 , wherein the floating field is to extend the payload field of either the first slot or the second slot by eleven bits.

8. The apparatus of claim 5 , wherein the third slot is adapted to be encoded with one or more of acknowledgements and credit returns.

9. The apparatus of claim 5 , wherein the flit further comprises a 16-bit cyclic redundancy check (CRC) field.

10. The apparatus of claim 5 , wherein the flit further comprises an 11-bit transaction identifier (TID) field.

11. The apparatus of claim 1 , wherein each slot is to include to be encoded with a respective header of a plurality of distinct messages.

12. The apparatus of claim 11 , wherein each message is associated with a respective transaction within a particular virtual network.

13. The apparatus of claim 12 , wherein the flit further comprises a virtual network identifier to identify the particular virtual network.

14. The apparatus of claim 12 , wherein message headers associated with transactions in different virtual networks are to be included in distinct flits.

15. An apparatus comprising:
I/O logic, implemented at least in part in hardware circuitry, the I/O logic to:
receive a flit over a serial data link, wherein the flit has a defined format, and the format defines three or more slots to be included in the flit and a floating field to be used as an extension of any one of two or more of the slots, wherein each of the three or more slots comprises a respective control field and a respective payload field, and the floating field is to extend one of the payload fields of the three or more slots; and
process each slot to identify one or more headers encoded in the three or more slots and relating to one or more transactions.

16. The apparatus of claim 15 , wherein the one or more headers comprise three or more headers and each of the three or more slots is encoded with a respective one of the three or more headers.

17. The apparatus of claim 16 , wherein each of the headers corresponds to a respective message associated with a different, respective transaction.

18. The apparatus of claim 17 , wherein each of the transactions is included in a particular virtual network.

19. The apparatus of claim 15 , wherein the three or more slots consist of three defined slots.

20. The apparatus of claim 19 , wherein the flit comprises 192 bits.

21. The apparatus of claim 20 , wherein the first of the three slots comprises 72 bits, the second of the three slots comprises 70 bits, and third slot comprises 18 bits.

22. The apparatus of claim 21 , wherein the floating field is to extend the payload field of either the first slot or the second slot.

23. The apparatus of claim 22 , wherein the I/O logic is further to identify which of the first and second slots the floating field is to extend.

24. The apparatus of claim 21 , wherein the third slot is adapted to be encoded with one or more of acknowledgements and credit returns.

25. A method comprising:
identifying transaction data to be sent to a device on a serial data link;
generating, from the transaction data, one or more flits according to a defined format, wherein the format defines that each of the one or more flits is to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots, wherein each of the three or more slots comprises a respective control field and a respective payload field, and the floating field is to extend one of the payload fields of the three or more slots; and
sending the flit to the device over the serial data link.

26. The method of claim 25 , wherein the flit comprises 192 bits, a first of the slots comprises 72 bits, a second of the slots comprises 70 bits, and a third of the slots comprises 18 bits.

27. The method of claim 25 , wherein the floating field comprises eleven bits.

28. A system comprising:
a first device; and
a second device communicatively coupled to the first device using a serial data link, the second device including a link layer module executed by at least one processor to:
identify transaction data to be sent to the first device on the data link;
generate, from the transaction data, one or more flits according to a defined format, wherein the format defines that each of the one or more flits is to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots, wherein each of the three or more slots comprises a respective control field and a respective payload field, and the floating field is to extend one of the payload fields of the three or more slots; and
send the flit to the first device over the data link.

29. The system of claim 28 , wherein the first device comprises a microprocessor.

30. The system of claim 29 , wherein the second device comprises a second microprocessor.

31. The system of claim 29 , wherein the second device comprises a graphics accelerator.

32. The system of claim 28 , wherein the first device includes link layer logic to:
receive the flits over the data link; and
process each slot to identify one or more headers relating to one or more transactions.

Assignees

• Willey Jeff
• Blankenship Robert G
• Swanson Jeffrey C
• Safranek Robert J
• Intel Corp

Inventors

• Willey Jeff
• Blankenship Robert G
• Swanson Jeffrey C
• Safranek Robert J

Classifications

• H04L45/74

  Address processing for routing · CPC title

• H04L12/4641

  Virtual LANs, VLANs, e.g. virtual private networks [VPN] (LAN interconnection over a bridge based backbone H04L12/462; encapsulation techniques H04L12/4633; routing of packets H04L45/00; packet switches H04L49/00; virtual private networks for security H04L63/0272) · CPC title

• G06F9/44505

  Configuring for program initiating, e.g. using registry, configuration files · CPC title

• G06F8/71

  Version control (security arrangements therefor G06F21/57); Configuration management · CPC title

• G06F13/4282 Primary

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title