Predictive power capping and power allocation to computing nodes in a rack-based information handling system

US9753520B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9753520-B2
Application numberUS-201314139765-A
CountryUS
Kind codeB2
Filing dateDec 23, 2013
Priority dateDec 23, 2013
Publication dateSep 5, 2017
Grant dateSep 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A computer-implemented method enables rack-level predictive power capping and power budget allocation to processing nodes in a rack-based IHS. A rack-level management controller receives node-level power-usage data and settings from several block controllers, including current power consumption and an initial power budget for each node. A power consumption profile is generated based on the power-usage data for each node. A total available system power of the IHS is identified. A system power cap is determined based on the power consumption profiles and the total available system power. A current power budget is determined for each node based on an analysis of at least one of the power consumption profile, the initial power budget, the current power consumption, the system power cap, and the total available system power. A power subsystem regulates power budgeted and supplied to each node based on the power consumption profiles and the system power cap.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method to implement rack-level predictive power capping and power budget allocation to processing nodes in a rack-based information handling system (IHS), the method comprising: receiving, at a rack-level management controller, a plurality of node-level power-usage data and settings from a plurality of block controllers, including a current power consumption and an initial power budget, for each processing node within the IHS, wherein the processing nodes are arranged within blocks, each block having a block controller that handles block-level power allocation and control for all processing nodes within a corresponding block, wherein the rack-level management controller is communicatively coupled to each block controller through an infrastructure manager (IM), which connects to each block controller via at least one Ethernet cable that comprises a global throttle wire directly connecting each of the block controllers within the IHS with the IM, wherein the IM is also communicatively connected to the management controller via another Ethernet cable having a global throttle wire, and each block controller is communicatively coupled to each processing node within a corresponding block via another cable having a node-level global throttle wire allocated therein; generating a power consumption profile based on the power-usage data for each of the processing nodes; identifying a total available system power of all power modules supplying power to the IHS, wherein the IHS includes a plurality of power supply units (PSU) each capable of providing a pre-determinable amount of power for use by the components of the IHS and each coupled to and controlled by a power controller; determining a system power cap for the IHS based on the power consumption profiles and the total available system power; determining a current power budget for each of the blocks and for each of the processing nodes based on an analysis of at least one of the power consumption profile, the initial power budget, the current power consumption, the system power cap, and the total available system power; dynamically regulating an amount of power budgeted and supplied to each of the processing nodes of the IHS based on the power consumption profiles and the system power cap; and in response to a detected reduction in a total amount of the available power from all available PSUs to below the system power cap, automatically reducing the system power cap and concurrently reducing one or more allocated power budgets based on an analysis of historical usage per processing node and other factors, wherein automatically reducing the system power cap comprises: generating a signal on the global throttle wire allocated within each Ethernet cable, the global throttle wire being at least one wire in each Ethernet cable that is assigned to provide communication of a global throttle power reduction (GTPR) signal from the rack-level management controller to the IM controller and from the IM controller to each block controller, wherein the block controllers within the IHS are pre-programmed to respond to an assertion of the GTPR signal on the global throttle wire by immediately throttling or substantially reducing processing operations of at least one processing node to reducing an overall power consumption within a corresponding block being controlled by the block controller. 2. The method of claim 1 , further comprising: initializing the management controller during start-up configuration of the IHS; establishing communication between the management controller, the power subsystem, and the block controllers, which each control block-level operations of processing nodes within a corresponding block; triggering the block controllers to regulate an amount of power supplied to each of the processing nodes within an associated block based on the current power budget allocated to each of the processing nodes within the associated block; tracking, via the block controllers, the power-usage data and settings for the processing nodes within the associated block; and transmitting the power-usage data and settings from the block controllers to the management controller. 3. The method of claim 1 , further comprising: detecting a current power consumption by a first processing node within the IHS; determining if an increase in the current power consumption has occurred for the first processing node; in response to determining that an increase in the current power consumption has occurred for the first processing node, determining if the required power to operate all of the processing nodes at current consumption levels is approaching the system power cap; and in response to determining that the current power consumption by all of the processing nodes is less than the system power cap: increasing the power budget of the first processing node to a new power budget and providing a corresponding increase in the first power allocation to the first processing node; and re-adjusting the power allocation across the IHS based on the new power budget. 4. The method of claim 3 , further comprising: determining if any of the processing nodes are using less than a pre-determined amount of their current power budget allocation over a minimum established period of time; and in response to determining that at least one second processing node is using less than the pre-determined amount of its current power budget allocation: re-apportioning at least a portion of an unused power amount from the current power budget allocated to the at least one second processing node to provide a second, higher power budget allocated to the first processing node based on the new power budget; and increasing the power budget of the first processing node to create the new power budget. 5. The method of claim 1 , further comprising: storing the power consumption profiles within a power consumption history table in a persistent storage device. 6. The method of claim 1 , further comprising: identifying a decrease in the current power consumption for the first processing node; tracking a period of time over which the decrease in the power consumption occurs; in response to the period of time not exceeding a pre-established power budget adjustment time (PBAT) threshold, maintaining the current power budget allocated to the first processing node; and in response to the period of time exceeding the pre-established PBAT threshold: reducing a value of the current power budget of the first processing node to generate a new power budget; and triggering the power subsystem of the IHS to provide a second power allocation for the first processing node based on the new power budget. 7. The method of claim 6 , further comprising: determining the decrease in the current power budget for the first processing node; and increasing the available amount of power within the system power cap by an amount corresponding to the decrease in the current power budget for the first processing node. 8. The method of claim 7 , further comprising: determining a new power budget to allocate to one or more of the higher-power-usage processing nodes based on the increase in the available amount of power within the system power cap; and triggering the power subsystem of the IHS to provide the new power budget to the one or more processing nodes. 9. The method of claim 1 , further comprising: determining a number of PSUs from the plurality of PSUs that are required to be utilized to provide the system power cap; in response to the number of PSUs required to provide the system power cap being less than a total number of PSUs, autonomously shutting off one or more of a remaining PSUs that are not

Assignees

Inventors

Classifications

  • Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

  • G06F1/3234Primary

    Power saving characterised by the action undertaken · CPC title

  • Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

  • by switching off individual functional units in the computer system · CPC title

  • by lowering the supply or operating voltage · CPC title

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What does patent US9753520B2 cover?
A computer-implemented method enables rack-level predictive power capping and power budget allocation to processing nodes in a rack-based IHS. A rack-level management controller receives node-level power-usage data and settings from several block controllers, including current power consumption and an initial power budget for each node. A power consumption profile is generated based on the powe…
Who is the assignee on this patent?
Dell Inc, Dell Products Lp
What technology area does this patent fall under?
Primary CPC classification G06F1/3234. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).