Method of obtaining planar semipolar gallium nitride surfaces
US-2017033186-A1 · Feb 2, 2017 · US
US9752252B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9752252-B1 |
| Application number | US-201615272153-A |
| Country | US |
| Kind code | B1 |
| Filing date | Sep 21, 2016 |
| Priority date | Jan 21, 2009 |
| Publication date | Sep 5, 2017 |
| Grant date | Sep 5, 2017 |
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A method of epitaxially growing nitrogen-based compound semiconductor thin films on a semiconductor substrate, which is periodically patterned with grooves. The method can provide an epitaxial growth of a first crystalline phase epitaxial film on the substrate, and block the growth of an initial crystalline phase with barrier materials prepared at the sides of the grooves. Semiconductor devices employing the epitaxial films are also disclosed.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a silicon-on-insulator substrate comprising a silicon layer over an insulating layer; a plurality of grooves within the silicon layer; a mask structure comprising a plurality of openings therein over the silicon layer, wherein the plurality of openings in the mask structure are aligned with the plurality of grooves; an epitaxial layer in each of the plurality of grooves in the silicon layer, wherein the epitaxial layer comprises hexagonal phase material and cubic phase material, the cubic phase material extending through each of the plurality of openings in the mask structure, growth of the hexagonal phase material having been blocked by the mask structure in a manner so that the hexagonal phase material does not extend above the mask structure. 2. The semiconductor device of claim 1 , wherein the mask comprises substantially vertical sidewalls. 3. The semiconductor device of claim 1 , wherein the mask comprises inclined sidewalls with a sufficient incline to block the growth of the hexagonal phase material above the masking structure. 4. The semiconductor device of claim 1 , wherein the cubic phase material is coalesced to form a wide area film. 5. The semiconductor device of claim 1 , wherein the cubic phase material forms a plurality of island films. 6. The semiconductor device of claim 1 , where the silicon layer of the silicon-on-insulator substrate is oriented to a (001) silicon facet. 7. The semiconductor device of claim 6 , where the grooves comprise sidewalls of opposing {111} crystal planes of the silicon layer. 8. The semiconductor device of claim 1 , wherein the mask structure is formed from a single material. 9. A semiconductor device, comprising: a silicon-on-insulator substrate comprising a silicon layer over an insulating layer; a plurality of grooves within the silicon layer where the grooves are formed with two opposing faces and with a bottom face that is parallel to the initial face of the silicon layer; a mask structure comprising a plurality of openings therein over the silicon layer, wherein the plurality of openings in the mask structure are aligned with the plurality of grooves; an epitaxial layer in each of the plurality of grooves in the silicon layer, wherein the epitaxial layer comprises hexagonal phase material and cubic phase material, the cubic phase material extending through each of the plurality of openings in the mask structure, growth of the hexagonal phase material having been blocked by the mask structure in a manner so that the hexagonal phase material does not extend above the mask structure. 10. The semiconductor device of claim 9 , wherein the mask comprises substantially vertical sidewalls. 11. The semiconductor device of claim 9 , wherein the mask comprises inclined sidewalls with a sufficient incline to block the growth of the hexagonal phase material above the masking structure. 12. The semiconductor device of claim 9 , wherein the cubic phase material is coalesced to form a wide area film. 13. The semiconductor device of claim 9 , wherein the cubic phase material forms a plurality of island films. 14. The semiconductor device of claim 9 , where the silicon layer of the silicon-on-insulator substrate is oriented to a (001) silicon facet. 15. The semiconductor device of claim 14 , where the grooves comprise sidewalls of opposing {111} crystal planes of the silicon layer. 16. The semiconductor device of claim 9 , wherein the mask structure is formed from a single material.
Crystal orientation · CPC title
Nitrides · CPC title
Nitrides · CPC title
Crystal orientations · CPC title
Surface structures · CPC title
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