Multiple mode RF circuit
US-8963612-B1 · Feb 24, 2015 · US
US9748984B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9748984-B2 |
| Application number | US-201615222427-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 28, 2016 |
| Priority date | Sep 5, 2013 |
| Publication date | Aug 29, 2017 |
| Grant date | Aug 29, 2017 |
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A mixing stage includes a first modulation stage that receives an input signal from a first common node of the mixing stage, a first local oscillator input that receives a local oscillator signal, and a first modulation signal output adapted to provide a first modulated signal. A second modulation stage of the mixing stage includes a second input that receives a phase inverted representation of the input signal from a second common node of the mixing stage, a second local oscillator input that receives the local oscillator signal, and a second modulation signal output adapted to provide a second modulated signal. A current generation circuit provides a supply current to the first common node and to the second common node. A current control circuit is adapted to superimpose an offset current to the current of at least one node of the first common node and the second common node.
Opening claim text (preview).
What is claimed is: 1. A current control circuit, comprising: an output terminal configured to superimpose an offset current to a current provided to an information signal input of a mixing stage; a current mirror circuit configured to provide the output current, the current mirror circuit being coupled to the output terminal; and a digital to analog converter coupled to the current mirror circuit such that a variation of the output voltage of the digital to analog converter causes a variation of the output current of the current mirror circuit. 2. The current control circuit of claim 1 , wherein the output of the digital to analog converter is directly coupled to a control terminal of a transistor of the current mirror circuit. 3. The current control circuit of claim 1 , further comprising: a second current mirror circuit configured to provide a second output current being complementary to the output current, the second current mirror circuit being coupled to the output terminal of the current control circuit. 4. A mixing stage, comprising: a first modulation stage comprising: a first input configured to receive an input signal, the input being coupled to a first common node of the mixing stage, a first local oscillator input configured to receive a local oscillator signal oscillating with a predetermined local oscillator frequency, and a first modulation signal output configured to provide a first modulated signal depending on the local oscillator signal and on the input signal; a second modulation stage comprising: a second input configured to receive a phase inverted representation of the input signal, the second input being coupled to a second common node of the mixing stage, a second local oscillator input configured to receive the local oscillator signal, and a second modulation signal output configured to provide a second modulated signal depending on the local oscillator signal and on the a phase inverted representation of the input signal; an information signal input coupled to the first common node and to the second common node; a current generation circuit configured to provide a supply current, the current generation circuit being coupled to the first common node and to the second common node; and a current control circuit coupled to the first common node and to the second common node, the current control circuit being configured to superimpose an offset current to the current of at least one node of the first common node and the second common node, the current control circuit comprising: a current mirror circuit configured to provide the offset current; and a digital to analog converter coupled to the current mirror circuit such that a variation of the output voltage of the digital to analog converter causes a variation of the output current of the current mirror circuit. 5. The mixing stage of claim 4 , wherein the current control circuit is configured to modify the offset current in finite quantities. 6. The mixing stage of claim 4 , wherein the digital to analog converter has a resolution of less than 10 bits. 7. The mixing stage of claim 4 , wherein the current control circuit is configured to superimpose a first offset current to the first common node and a second offset current to the second common node, the second offset current being complementary to the first offset current. 8. The mixing stage of claim 4 , wherein the current generation circuit comprises a first current source coupled to the first common node and a different second current source coupled to the second common node. 9. The mixing stage of claim 4 , further comprising an impedance matching circuit coupled between the current control circuit and the first common node and between the current control circuit and the second common node, the impedance matching circuit being configured to increase an input impedance of the current control circuit. 10. The mixing stage of claim 4 , wherein the first modulation stage is a balanced mixing stage comprising a first node and a second node within the modulation signal output, the first modulation stage being configured to provide a first modulated sub signal depending on the local oscillator signal and on the input signal at the first node and to provide a second modulated sub signal depending on a phase inverted representation of the local oscillator signal and on the input signal at a second node; and wherein the second modulation stage is a balanced mixing stage comprising a third node and a fourth node within the modulation signal output, the second modulation stage being configured to provide a third modulated sub signal depending on the local oscillator signal and on a phase inverted representation of the input signal at the third node and to provide a fourth modulated sub signal depending on a phase inverted representation of the local oscillator signal and on the phase inverted representation of the input signal at the fourth node; and wherein a mixing signal output of the mixing stage comprises a first terminal and a second terminal, the first terminal being coupled to the first node and to the fourth node and the second terminal being coupled to the second node and to the third node. 11. The mixing stage of claim 4 , wherein the information signal input comprises a third terminal coupled to the first common node and a fourth terminal coupled to the second common node, the third terminal being configured to receive the information signal and the fourth terminal being configured to receive a phase inverted representation of the information signal. 12. A modulator circuit for providing a single sideband modulated signal, the modulator circuit comprising: a first mixing stage, comprising: a first modulation stage comprising: a first input configured to receive an input signal, the input being coupled to a first common node of the first mixing stage, a first local oscillator input configured to receive a local oscillator signal oscillating with a predetermined local oscillator frequency, and a first modulation signal output configured to provide a first modulated signal depending on the local oscillator signal and on the input signal; a second modulation stage comprising: a second input configured to receive a phase inverted representation of the input signal, the second input being coupled to a second common node of the first mixing stage, a second local oscillator input configured to receive the local oscillator signal, and a second modulation signal output configured to provide a second modulated signal depending on the local oscillator signal and on the a phase inverted representation of the input signal; an information signal input coupled to the first common node and to the second common node; a current generation circuit configured to provide a supply current, the current generation circuit being coupled to the first common node and to the second common node; a current control circuit coupled to the first common node and to the second common node, the current control circuit being configured to superimpose an offset current to the current of at least one node of the first common node and the second common node the current control circuit comprising a current mirror circuit configured to provide the offset current; a digital to analog converter coupled to the current mirror circuit such that a variation of the output voltage of the digital to analog converter causes a variation of the output current of the current mirror circuit; a first mixing stage output, the first mixing stage output being coupled to the first modulation signal output and to the second modulation signal output of the first mixing st
Arrangements to linearise a transconductance stage of a mixer arrangement · CPC title
with means for limiting noise, interference or distortion (H04B1/0483 takes precedence) · CPC title
using bipolar transistors (H03D7/145 takes precedence) · CPC title
Double balanced arrangements, i.e. where both input signals are differential · CPC title
with one sideband wholly or partially suppressed · CPC title
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