Reducing distortion in an analog-to-digital converter

Patent metadata

Field	Value
Publication number	US-9748963-B2
Application number	US-201615188272-A
Country	US
Kind code	B2
Filing date	Jun 21, 2016
Priority date	Jun 23, 2015
Publication date	Aug 29, 2017
Grant date	Aug 29, 2017

Abstract

In one embodiment, an apparatus includes: a first voltage controlled oscillator (VCO) analog-to-digital converter (ADC) unit to receive a first portion of a differential analog signal and convert the first portion of the differential analog signal into a first digital value; a second VCO ADC unit to receive a second portion of the differential analog signal and convert the second portion of the differential analog signal into a second digital value; a combiner to form a combined digital signal from the first and second digital values; a decimation circuit to receive the combined digital signal and filter the combined digital signal into a filtered combined digital signal; and a cancellation circuit to receive the filtered combined digital signal and generate a distortion cancelled digital signal, based at least in part on a coefficient value.

First claim

What is claimed is:

1. An apparatus comprising:
a first voltage controlled oscillator (VCO) analog-to-digital converter (ADC) unit to receive a first analog signal and convert the first analog signal into a first digital signal;
a decimation filter circuit to receive the first digital signal and filter the first digital signal into a filtered first digital signal; and
a cancellation circuit feed forward coupled to receive the filtered first digital signal and generate an output first digital signal based at least in part on a coefficient value, to reduce third-order distortion.

2. The apparatus of claim 1 , wherein the cancellation circuit is to obtain the coefficient value from a non-volatile storage.

3. The apparatus of claim 2 , wherein the non-volatile storage is to store a plurality of coefficient values, each associated with at least one of a temperature range and a process type.

4. The apparatus of claim 3 , further comprising a controller to select the coefficient value from the plurality of coefficient values based on temperature information of the apparatus received from at least one thermal sensor.

5. The apparatus of claim 1 , wherein the cancellation circuit includes:
a first function generator to generate a cubed value of the filtered first digital signal;
a gain circuit to apply the coefficient value to the cubed value to generate a cancellation signal; and
a combiner to combine the filtered first digital signal and the cancellation signal to obtain the output first digital signal.

6. The apparatus of claim 1 , wherein the cancellation circuit is further to reduce second-order distortion.

7. The apparatus of claim 1 , wherein the first VCO ADC unit comprises a first voltage-controlled ring oscillator and further comprising a second VCO ADC unit comprising a second voltage-controlled ring oscillator, to reduce second-order distortion.

8. The apparatus of claim 7 , wherein the second VCO ADC unit is to receive a second analog signal and convert the second analog signal into a second digital signal, and a second combiner to form a combined digital signal from the first digital signal and the second digital signal.

9. The apparatus of claim 1 , wherein the cancellation circuit comprises:
a first function generator to generate a cubed value of the filtered first digital signal;
a calibration circuit to receive a digitized calibration signal, calculate a power value therefrom, and generate the coefficient value based on the power value;
a multiplier to generate a product of the cubed value and the coefficient value; and
a second combiner to combine the product and the filtered first digital signal.

10. The apparatus of claim 9 , wherein the first function generator is coupled in feed forward between the decimation filter circuit and the second combiner.

11. The apparatus of claim 9 , further comprising a tone generation circuit to provide a calibration signal corresponding to the digitized calibration signal to the first VCO ADC unit in a calibration mode to enable the calibration circuit to generate the coefficient value.

12. The apparatus of claim 1 , wherein the first VCO ADC unit comprises:
a ring oscillator to receive the first analog signal and output a plurality of phase signals;
a plurality of sampler circuits to receive the plurality of phase signals and output a plurality of sampled signals;
a plurality of phase detectors to detect a phase between a pair of the plurality of sampled signals;
a plurality of encoders to receive the detected phase and generate binary outputs; and
a differentiator to receive the binary outputs and generate the first digital signal.

13. A system comprising:
a tuner to receive a radio frequency (RF) signal, the tuner comprising:
a first filter to filter the RF signal; and
a mixer to downconvert the filtered RF signal to a second frequency signal comprising a differential analog signal; and

a demodulator coupled to the tuner to receive the second frequency signal, the demodulator comprising:
a differential analog-to-digital converter (ADC) coupled to the mixer, the differential ADC comprising:
a first voltage controlled oscillator (VCO) analog-to-digital converter (ADC) unit to receive and convert a first portion of the differential analog signal to a first digital value;
a second VCO ADC unit to receive and convert a second portion of the differential analog signal to a second digital value;
a first combiner to form a combined digital signal from the first and second digital values;
a correction circuit to receive the combined digital signal and generate a third-order distortion cancelled digital signal therefrom, using a coefficient value; and
demodulator circuitry to demodulate the third-order distortion cancelled digital signal and output a transport stream.

14. The system of claim 13 , wherein the first VCO ADC unit comprises a first voltage-controlled ring oscillator and the second VCO ADC unit comprises a second voltage-controlled ring oscillator, to remove second-order distortion from the combined digital signal.

15. The system of claim 13 , wherein the first VCO ADC unit comprises:
a ring oscillator to receive the first portion of the differential analog signal and output a plurality of phase signals;
a plurality of sampler circuits to receive the plurality of phase signals and output a plurality of sampled signals;
a plurality of phase detectors to detect a phase between a pair of the plurality of sampled signals;
a plurality of encoders to receive the detected phase and generate binary outputs; and
a differentiator to receive the binary outputs and generate the first digital value.

16. The system of claim 13 , wherein the correction circuit comprises:
a cancellation loop circuit having:
a first function generator to generate a cubed value of the combined digital signal;
a gain circuit to apply the coefficient value to the cubed value to generate a cancellation signal; and
a second combiner to combine the combined digital signal and the cancellation signal to obtain the third-order distortion cancelled digital signal.

17. The system of claim 16 , wherein the first function generator is coupled in feed forward between the first combiner and the second combiner.

18. The system of claim 13 , wherein the correction circuit comprises:
a calibration loop circuit having:
a mixer to receive the combined digital signal and mix the combined digital signal with a mixing signal to obtain a mixed signal;
a filter to filter the mixed signal;
a second function generator to generate a squared value of the filtered mixed signal; and
a third combiner to generate the coefficient value from the squared value.

19. A method comprising:
determining at least one operating parameter of a device;
accessing an entry of a non-volatile storage to obtain a coefficient value based on the at least one operating parameter; and
providing the coefficient value to a cancellation circuit of an analog-to-digital converter of the device, to enable the cancellation circuit to reduce third-order distortion in a digital value generated in the analog-to-digital converter from an analog signal.

20. The method of claim 19 , further comprising:
in a first mode, determining the at least one operating parameter and accessing the entry;
in a second mode, generating the coefficient value in a calibration circuit; and
disabling the calibration circuit after generating the coefficient value.

Assignees

• Silicon Lab Inc

Inventors

• Coban Abdulkerim L
• Koroglu Mustafa H

Classifications

• H03M1/1009

  Calibration · CPC title

• H03M1/0614 Primary

  of harmonic distortion (H03M1/0617 takes precedence) · CPC title

• H03M1/124

  Sampling or signal conditioning arrangements specially adapted for A/D converters · CPC title

• H03M1/0626 Primary

  by filtering · CPC title

• H03M1/60

  with intermediate conversion to frequency of pulses · CPC title