Frequency multiplier based on ring oscillator using power gating injection locking
US-2024267037-A1 · Aug 8, 2024 · US
US9748962B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9748962-B2 |
| Application number | US-201514920476-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 22, 2015 |
| Priority date | Oct 22, 2015 |
| Publication date | Aug 29, 2017 |
| Grant date | Aug 29, 2017 |
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A voltage controlled oscillator arrangement is disclosed. The arrangement includes a voltage controlled oscillator and a quadratic extension component. The voltage controlled oscillator has a tuning port. The tuning port is configured to select an operating frequency according to an applied voltage. The quadratic extension component is configured to generate a quadratic tuning voltage that as the applied voltage to the tuning port. The quadratic tuning voltage is generated according to a linear temperature compensation signal.
Opening claim text (preview).
What is claimed is: 1. A voltage controlled oscillator arrangement comprising: a voltage controlled oscillator having a tuning port, wherein the tuning port is configured to select an operating frequency according to an applied voltage; a quadratic extension circuit configured to generate a quadratic tuning voltage as the applied voltage to the tuning port, wherein the quadratic tuning voltage is generated according to a linear temperature compensation signal; and wherein the quadratic extension further comprises: a linear compensation circuit configured to generate the linear temperature compensation signal according to a current temperature; and a squarer circuit configured to generate a second order term for the quadratic tuning voltage according to the linear temperature compensation signal, wherein the squarer circuit comprises a trans linear loop configured to scale the second order term by a bias current, and wherein the quadratic extension circuit is further configured to combine the scaled second order term with the linear temperature compensation signal to generate the quadratic tuning voltage. 2. The arrangement of claim 1 , wherein the quadratic extension circuit is further configured to generate the quadratic tuning voltage using a temperature invariant current. 3. The arrangement of claim 1 , wherein the quadratic extension circuit scales the linear temperature compensation signal using the bias current. 4. The arrangement of claim 1 , wherein the voltage controlled oscillator has first order frequency variations according to temperature variations and second order frequency variations according to the temperature variations. 5. The arrangement of claim 4 , wherein the linear temperature compensation signal mitigates the first order frequency variations. 6. The arrangement of claim 5 , wherein the quadratic tuning voltage mitigates the second order frequency variations. 7. The arrangement of claim 6 , wherein the voltage controlled oscillator is configured to generate an output signal at the operating frequency. 8. The arrangement of claim 1 , wherein the linear temperature compensation signal is a proportional to an absolute temperature. 9. The arrangement of claim 1 , wherein the trans linear loop comprises a loop of PNP bipolar transistors. 10. A quadratic extension arrangement for generating a quadratic temperature compensation signal, the arrangement comprising: a first current mirror configured to generate a first mirrored current from a linear temperature compensation signal; a second current mirror configured to generate a second mirrored current from the first mirrored current; a linear compensation circuit configured to generate the linear compensation signal according to a current temperature; a squarer circuit configured to generate a second order term from the second mirror current; and an output configured to combine the second order term with the first mirror current to generate the quadratic temperature compensation signal. 11. The arrangement of claim 10 , wherein the linear temperature compensation signal is proportional to an absolute temperature. 12. The arrangement of claim 10 , wherein the squarer circuit includes a trans linear loop of transistors. 13. The arrangement of claim 12 , wherein the transistors are PNP bipolar transistors. 14. The arrangement of claim 12 , wherein the transistors are NPN bipolar transistors and the squarer circuit includes a temperature invariant current source. 15. The arrangement of claim 12 , wherein the squarer circuit includes an auxiliary transistor configured to reduce base currents of transistors with the squarer circuit. 16. A method of operating a voltage controlled oscillator using second order temperature compensation, the method comprising: obtaining a current temperature; generating a linear temperature compensation signal according to the current temperature; generating a second order term from the linear temperature compensation signal using a squarer circuit; scaling the second order term based on a bias current; and generating a quadratic temperature compensation signal using the second order term and the linear temperature compensation signal. 17. The method of claim 16 , further comprising adjusting an operating frequency of the voltage controlled oscillator according to the quadratic temperature compensation signal. 18. The method of claim 17 , wherein the operating frequency is within an allowed range of frequencies. 19. The method of claim 16 , wherein the bias current is temperature invariant.
using a reference signal directly applied to the generator · CPC title
against variations of temperature only · CPC title
for temperature compensation · CPC title
Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature · CPC title
the amplifier comprising one or more bipolar transistors · CPC title
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