Pulse width modulation

Patent metadata

Field	Value
Publication number	US-9748940-B2
Application number	US-201615017010-A
Country	US
Kind code	B2
Filing date	Feb 5, 2016
Priority date	Feb 9, 2015
Publication date	Aug 29, 2017
Grant date	Aug 29, 2017

Abstract

A device includes a combining circuitry that receives an incoming signal, and one or more delayed signals from a delay circuitry. The combining circuitry combines the incoming signal and the one or more delayed signals to generate a combined signal. The device includes a comparing circuitry that receives the combined signal from the combining circuitry, and compares a pulse width of the combined signal to a threshold pulse width. When the pulse width of the combined signal is greater than or equal to the threshold pulse width, the comparing circuitry provides the combined signal to an amplifier circuit and provides a null signal to the delay circuitry. The amplifier circuit generates a pulse width modulated (PWM) signal based on the combined signal.

First claim

What is claimed is:

1. A device comprising:
a sigma delta modulator that is configured to:
receive, from a natural sampling point calculation circuit, natural sampling points corresponding to an input signal,
compress a number of bits associated with each natural sampling point, and
provide the compressed number of bits associated with each natural sampling point to a combining circuitry as an incoming signal;

the combining circuitry that is configured to:
receive the incoming signal,
receive one or more delayed signals from a delay circuitry,
combine the incoming signal and the one or more delayed signals to generate a combined signal; and

a comparing circuitry that is configured to:
receive, from the combining circuitry, the combined signal,
compare a pulse width of the combined signal to a threshold pulse width,
when the pulse width of the combined signal is greater than or equal to the threshold pulse width:
provide the combined signal to an amplifier circuit, the amplifier circuit being configured to generate a pulse width modulated (PWM) signal based on the combined signal, and
provide a null signal to the delay circuitry, and

when the pulse width of the combined signal is less than the threshold pulse width:
provide the null signal to the amplifier circuit, the amplifier circuit being configured to generate the PWM signal based on the null signal, and
provide the combined signal to the delay circuitry.

2. The device of claim 1 , wherein the threshold pulse width is based on an operational bandwidth of the amplifier circuit.

3. The device of claim 2 , wherein the threshold pulse width corresponds to a minimum signal to noise ratio (SNR) of the PWM signal output by the amplifier circuit.

4. The device of claim 1 , further comprising the delay circuitry that is configured to:
receive one of the null signal or the combined signal from the comparing circuitry; and
provide the null signal or the combined signal to the combining circuitry as a delayed signal.

5. The device of claim 1 , wherein the combining circuitry includes an adder circuit that is configured to add the incoming signal and the one or more delayed signals.

6. The device of claim 1 , wherein the combining circuitry includes an integrator circuit that is configured to integrate the incoming signal with the one or more delayed signals.

7. The device of claim 6 , wherein the integrator circuit is configured to perform a weighted integration of the one or more delayed signals with the incoming signal to generate the combined signal, and
wherein coefficients for the weighted integration are based on one or more of a signal modulation scheme used by the amplifier circuit, a signal to noise ratio (SNR) of the PWM signal output by the amplifier circuit, a total harmonic distortion and noise (THD+N) parameter of the PWM signal output by the amplifier circuit, or an out of band energy of the PWM signal output by the amplifier circuit.

8. The device of claim 1 , further comprising the natural sampling point calculation circuit that is configured to:
calculate natural sampling points corresponding to the input signal; and
provide the natural sampling points to the sigma delta modulator.

9. A method comprising:
receiving natural sampling points corresponding to an input signal;
compressing a number of bits associated with each natural sampling point;
providing the compressed number of bits associated with each natural sampling point as an incoming signal,
combining the incoming signal and one or more delayed signals to generate a combined signal;
comparing a pulse width of the combined signal to a threshold pulse width;
when the pulse width of the combined signal is greater than or equal to the threshold pulse width:
generating a pulse width modulated (PWM) signal based on the combined signal,
generating the one or more delayed signals based on a null signal; and

when the pulse width of the combined signal is less than the threshold pulse width:
generating the PWM signal based on the null signal, and
generating the one or more delayed signals based on the combined signal.

10. The method of claim 9 , wherein the threshold pulse width is based on an operational bandwidth of an amplifier circuit.

11. The method of claim 10 , wherein the threshold pulse width corresponds to a minimum signal to noise ratio (SNR) of the PWM signal output by the amplifier circuit.

12. The method of claim 9 , wherein combining the incoming signal and the one or more delayed signals to generate the combined signal comprises:
adding the incoming signal and the one or more delayed signals.

13. The method of claim 9 , wherein combining the incoming signal and the one or more delayed signals to generate the combined signal comprises:
integrating the incoming signal with the one or more delayed signals.

14. The method of claim 13 , further comprising:
performing a weighted integration of the one or more delayed signals with the incoming signal to generate the combined signal,
wherein coefficients for the weighted integration are based on one or more of a signal modulation scheme used by an amplifier circuit, a signal to noise ratio (SNR) of the PWM signal output by the amplifier circuit, a total harmonic distortion and noise (THD+N) parameter of the PWM signal output by the amplifier circuit, or an out of band energy of the PWM signal output by the amplifier circuit.

15. The method of claim 13 , wherein integrating the incoming signal with the one or more delayed signals comprises:
integrating n−1 delayed signals with the incoming signal to generate the combined signal.

16. The method of claim 9 , wherein generating the PWM signal based on the null signal comprises:
generating a pulse of zero width; and
outputting a zero value corresponding to the PWM signal.

17. A device comprising:
a combining circuitry that is configured to:
receive an incoming signal,
receive one or more delayed signals from a delay circuitry,
combine the incoming signal and the one or more delayed signals to generate a combined signal,

wherein the combining circuitry includes an n th order integrator that is configured to integrate n−1 delayed signals with the incoming signal to generate the combined signal; and
a comparing circuitry that is configured to:
receive, from the combining circuitry, the combined signal,
compare a pulse width of the combined signal to a threshold pulse width,
when the pulse width of the combined signal is greater than or equal to the threshold pulse width:
provide the combined signal to an amplifier circuit, the amplifier circuit being configured to generate a pulse width modulated (PWM) signal based on the combined signal, and
provide a null signal to the delay circuitry, and

when the pulse width of the combined signal is less than the threshold pulse width:
provide the null signal to the amplifier circuit, the amplifier circuit being configured to generate the PWM signal based on the null signal, and
provide the combined signal to the delay circuitry.

18. The device of claim 17 , further comprising the amplifier circuit, wherein upon receiving the null signal, the amplifier circuit is configured to:
generate a pulse of zero width; and
output a zero value corresponding to the PWM signal.

19. The device of claim 17 , further comprising the amplifier circuit, wherein upon receiving the combined signal, the amplifier circuit is configured to:
generate a pulse with a pulse width that is greater than or equal to

Assignees

• Marvell World Trade Ltd

Inventors

• Jain Kapil
• Wu Zining

Classifications

• H03K7/08 Primary

  Duration or width modulation {; Duty cycle modulation} · CPC title